remove very old parts of documentation

diff --git a/daqstartup.tex b/daqstartup.tex
index 021c61cea7788c8d5c7f38f96ac7d1355c1fc0e9..71d4f930ca7b7be5263ca8acba8c08608b965983 100755 (executable)
--- a/daqstartup.tex
+++ b/daqstartup.tex
@@ -1,7 +1,8 @@
 
 \subsection{Overview}
 
-One of the advantages of the new slow control system is that all subsystems now can be addressed and configured with one common interface. There is no need to log in to several boards and execute system specific commands there.
+One of the advantages of the new slow control system is that all subsystems now can be addressed and configured with one common interface. 
+There is no need to log in to several boards and execute system specific commands there.
 
 The startup procedure for each subsystem consists of several files:
 
@@ -97,13 +98,13 @@ The table with addresses has five columns, besides the address and the serial nu
 
 \lstset { caption ={Example: addresses\_oep.db}}
 \begin{lstlisting}
-# Address #   S/N   #   FPGA  #   Design  #  TRB  #
-###################################################
-  0x2000      021        1          12        0
-  0x2001      025        1          12        0
-  0x2002      024        1          12        0
-  0x2003      023        1          12        0
-  0x2004      022        1          12        0
+# Address #   S/N 
+##################
+  0x2000      0211
+  0x2001      0251
+  0x2002      0241
+  0x2003      0231
+  0x2004      0221
 \end{lstlisting}
 
 
@@ -145,21 +146,21 @@ w 0xfffd 0x8001 0x9
 \end{lstlisting}
 
 
-\subsection{Design Files}
-\label{daqdesignfiles}
-The table of design files is one table for all subsystem (and thus in the ``main'' directory) which gives the information which FPGA on which type of board has to be loaded with which design files. Addtionally the compile time of the design will be given. This can be read out from the boards from register 0x40 and serves as a version number for the design.
-
-Since the unpacker should be able to work in a data-driven mode, the version of the event data format should be included in the header. This can be accomplished by writing the data version number to a register (t.b.d.) on all SubEvent-building nodes during startup. The number has a size of 4 bits and therefore the maximum value is 16.
-
-
-\lstset { caption ={Example: designfiles.db}}
-\begin{lstlisting}
-#ID# Board/FPGA   #Comp. Time#        Filename       #IPU#
-##########################################################
- 8  TRBSlwCtrl     0x4ab38e12  trb2_ctrl_20091030.stp  1
- 9  MDCAddOnFPGA1  0x12347832  mdcopt_1_20091027.stp   1
- 10 MDCAddOnFPGA2  0x12347832  mdcopt_2_20091027.stp   1
-\end{lstlisting}
+% \subsection{Design Files}
+% \label{daqdesignfiles}
+% The table of design files is one table for all subsystem (and thus in the ``main'' directory) which gives the information which FPGA on which type of board has to be loaded with which design files. Addtionally the compile time of the design will be given. This can be read out from the boards from register 0x40 and serves as a version number for the design.
+% 
+% Since the unpacker should be able to work in a data-driven mode, the version of the event data format should be included in the header. This can be accomplished by writing the data version number to a register (t.b.d.) on all SubEvent-building nodes during startup. The number has a size of 4 bits and therefore the maximum value is 16.
+% 
+% 
+% \lstset { caption ={Example: designfiles.db}}
+% \begin{lstlisting}
+% #ID# Board/FPGA   #Comp. Time#        Filename       #IPU#
+% ##########################################################
+%  8  TRBSlwCtrl     0x4ab38e12  trb2_ctrl_20091030.stp  1
+%  9  MDCAddOnFPGA1  0x12347832  mdcopt_1_20091027.stp   1
+%  10 MDCAddOnFPGA2  0x12347832  mdcopt_2_20091027.stp   1
+% \end{lstlisting}
 
 
 \subsection{Modifiers}
@@ -195,14 +196,6 @@ Modifieres written in camel case have to be given to the startup script in all u
 
 \end{description}
 
-\subsubsection*{RICH Settings}
-\begin{description}
- \item[\textsc{Richnoinit}] Skip initializing ADCM and loading pedestals
- \item[\textsc{Richdebugmode}] Switch on debug words in RICH
- \item[\textsc{Richfullmode}] Set trigger type to RICH full data mode. Without this option, standard is normal mode.
-\end{description}
-
-
 \subsubsection*{MDC Settings}
 \begin{description}
  \item[\textsc{reg0}] Load settings for TDC register 0, overwrite default values in OEP
@@ -214,8 +207,3 @@ Modifieres written in camel case have to be given to the startup script in all u
  \item[\textsc{Mdcreboot}] Reboots OEP with the current design for data taking
 \end{description}
 
-\subsubsection*{Shower Settings}
-
-\begin{description}
- \item[\textsc{Showerped*}] Loads Shower pedestals. Valid names are Showerpeddef (loads the measured pedestals), Showerped20 (all set to 0x20), Showerped40 (all set to 0x40), Showerpedff (all set to 0xff)
-\end{description}