TOPNAME => "trb5sc_gbe",
-lm_license_file_for_synplify => "27000\@lxcad03.gsi.de",
+lm_license_file_for_synplify => "27000\@lxcad04.gsi.de",
lm_license_file_for_par => "1702\@hadeb05.gsi.de",
-lattice_path => '/opt/lattice/diamond/3.10_x64/',
-synplify_path => '/opt/synplicity/O-2018.09-SP1/',#K-2015.09',
+lattice_path => '/opt/lattice/diamond/3.12',
+synplify_path => '/opt/synplicity/R-2020.09-SP1/',#K-2015.09',
+synplify_command => "/opt/synplicity/R-2020.09-SP1/bin/synplify_premier",
#synplify_command => "/opt/lattice/diamond/3.4_x64/bin/lin64/synpwrap -fg -options",
#synplify_command => "/opt/synplicity/K-2015.09/bin/synplify_premier_dp",
#add_file -verilog -lib work "../../dirich/cores/serdes_sync_0_softlogic.v"
#channel 1, SFP
-add_file -vhdl -lib work "../cores/serdes_sync_0/serdes_sync_0.vhd"
-add_file -verilog -lib work "../cores/serdes_sync_0/serdes_sync_0_softlogic.v"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"
+add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_softlogic.v"
add_file -vhdl -lib work "./project/test_sfp/serdes_sync_0/serdes_sync_1/serdes_sync_1.vhd"
add_file -verilog -lib work "./project/test_sfp/serdes_sync_0/serdes_sync_1/serdes_sync_1_softlogic.v"
-##########################################
-add_file -vhdl -lib work "../../dirich/cores/pcs.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs2.vhd"
+
+##########################################
#TrbNet Endpoint
add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_2048x8x16.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp3/slv_mac_memory.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/ip_mem.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx18x9_wcnt.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_32kx18x9_wcnt.vhd"
+add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx18x9_wcnt.vhd"
+add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_32kx18x9_wcnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_8kx18x9_wcnt.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx9_af_cnt.vhd"
+add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_64kx9_af_cnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_8kx9_af_cnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_2kx9x18_wcnt.vhd"
add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_4kx18x9_wcnt.vhd"
BUS_IP_TX => busgbeip_tx,
BUS_REG_RX => busgbereg_rx,
BUS_REG_TX => busgbereg_tx,
- BUS_SCI_RX => busscigbe_rx,
- BUS_SCI_TX => busscigbe_tx,
+-- BUS_SCI_RX => busscigbe_rx,
+-- BUS_SCI_TX => busscigbe_tx,
MAKE_RESET_OUT => reset_via_gbe,
- DEBUG_OUT => open,
+ DEBUG_OUT => open--,
- DEBUG_media => debug_media
+-- DEBUG_media => debug_media
);
---------------------------------------------------------------------------