added tables with pinouts of possible TRB3 AddOns

diff --git a/electronics/electronics2013.pdf b/electronics/electronics2013.pdf
index 828da905d192570c4bc0223ded5fce5ba2013d5b..25e6a41c4b8108b75a1fcf122e56fe423348cc18 100644 (file)
Binary files a/electronics/electronics2013.pdf and b/electronics/electronics2013.pdf differ

diff --git a/electronics/electronics2013.tex b/electronics/electronics2013.tex
index ce86dce78b428e59ec32cad3320e4984922ca76e..06beec718e0eaa446fa00bd41019e4d0eb3f3ca8 100644 (file)
--- a/electronics/electronics2013.tex
+++ b/electronics/electronics2013.tex
@@ -30,6 +30,10 @@ Bluish and Yellowish colors show the origin of components.}
 \section{TRB3 \& AddOn}
 
 I/O from the TRB is provided via an Ada-AddOn with two connectors and 40 wire pairs each.
+Alternatively, the 4conn-AddOn provides four connectors with 20 wire pairs each. Appendix
+\ref{ADApinout} shows, that the pin-out of the 4conn-AddOn fits better with respect to the
+possibility to connect two identical CB to one FPGA.
+
 Using the standard AddOns from GSI with their standard connector (KEL 8925E series) saves us from
 building new boards.
 
@@ -51,10 +55,12 @@ improved handling.} Cables as well as connectors will be bought by GSI.
 
 Table \ref{iocount} gives a rough count of necessary I/O. The final number of connections required
 will strongly depend on the realization of the converter board, mainly with respect to the data
-buses for switches and ADCs. A.t.m. there are 14 I/O per converter board plus 12 I/O per sensor.
+buses for switches and ADCs. A.t.m. there are 14 I/O per converter board plus 14 I/O per sensor.
 Note that this setup is for M26 sensors only where we will not have any ladders larger than 2
 sensors. The number of I/O for the final sensor will be different.
 
+The available AddOns for TRB3 have 12 or 13 differential outputs for each CB available. 
+
 \begin{table}[htp]
  \centering
 \begin{tabularx}{\textwidth}{X|c|c|c|c}
@@ -67,8 +73,10 @@ Sensor Data: Clock, Marker, 2x Data per sensor & 0 & 0 & 8 & 0\\
 Sensor Control: Clock, Start, Reset. & 0 & 3 (2) & 0 & 0\\
 ADC for voltages and currents (SPI) & 0 & 3 & 2 & 1 (1)\\
 Voltage and JTAG switch (Bus) & 0 & 4 (4) & 0 & 1 (1) \\
+Fast Overcurrent Sense & 0 & 0 & 2 (2) & 0 \\
 \hline
-Total & 1 & 13 (6) & 10 & 2 (2)\\
+Total & 1 & 13 (6) & 12 (2) & 2 (2)\\
+Proposal for ADA-AddOn & 1 & 10 + 3 & 12 & 1 + 1 \\
 \end{tabularx}
 \caption{Inputs/Outputs from the FPGA to the converter board. The number in
 parentheses shows the number of I/O that could be replaced by a non-differential connection.}
@@ -248,5 +256,109 @@ The pin-out of the connector on the FEB has to be changed to allow for an additi
 Using sense lines for the supply voltages would be nice but is most likely
 not viable with the current bonding / cable set-up.
 
+\clearpage
+\appendix
+\section{FPGA 80-pin Connector Pin-out}
+\label{ADApinout}
+The ADA-AddOn for TRB3 has two connectors with 80 pins each. In total, the board has 37 wire pairs
+on each connector connected to the FPGA. Some are input-only and some do not support differential
+output. Both connectors should have identical pin-out so that two CB can be connected to each TRB3
+FPGA. Unfortunately, pin-out at the FPGA of the two connectors of the AddOn is slightly different.
+Hence, there are 12 differential outputs available on both connectors only.
+
+We could also use the 4-conn AddOn with four 40-pin connectors and slightly shuffled connections on
+the FPGA if pin-out fits better.
+
+
+
+\begin{table}[ht]
+\small
+ \centering
+\begin{tabular}{c|c|c|c|cc|c|c}
+ & \multicolumn{2}{c|}{\textbf{single}} & \multicolumn{3}{c|}{\textbf{differ.}} &
+\multicolumn{2}{c}{\textbf{Groups}}\\
+\textbf{Pair} & \textbf{I} & \textbf{O} & \textbf{I} & \multicolumn{2}{c|}{\textbf{O}} & \textbf{Con
+1} & \textbf{Con 2}\\
+\hline
+1  & X & X & X & -- & X  & 0   & 0   \\
+2  & X & X & X & -- & X  & 0   & 0   \\
+3  & X & X & X &  X & -- & 0   & 0 C \\
+4  & X & X & X & -- & -- & 0 C & 0   \\
+5  & X & X & X &  X & X  & 0   & 0   \\
+6  & X & - & X &  X & -- & 0   & 0   \\
+7  & X & X & X & -- & -- & 1   & 1   \\
+8  & X & X & X &  X & X  & 1   & 1   \\
+9  & X & X & X & -- & X  & 1   & 1   \\
+10 & X & X & X & -- & -- & 1 C & 1 C \\
+11 & X & X & X &  X & X  & 1   & 1   \\
+12 & X & X & X &  X & -- & 1   & 1   \\
+13 & X & X & X & -- & X  & 2   & 2   \\
+14 & X & X & X &  X & -- & 2   & 2   \\
+15 & X & X & X & -- & X  & 2   & 2   \\
+16 & X & X & X & -- & -- & 2 C & 2 C \\
+17 & X & X & X & -- & -- & 3   & 3   \\
+18 & X & X & X &  X & X  & 3   & 3   \\
+19 & X & X & X &  X & -- & 3   & 3   \\
+20 & X & X & X & -- & -- & 3 C & 3 C \\
+21 & X & X & X & -- & -- & 3   & 3   \\
+22 & X & X & X &  X & X  & 3   & 3   \\
+23 & X & X & X & -- & -- & 4   & 4   \\
+24 & X & X & X &  X & X  & 4   & 4   \\
+25 & X & X & X & -- & X  & 4   & 4   \\
+26 & X & X & X & -- & -- & 4 C & 4 C \\
+27 & X & X & X &  X & -- & 4   & 4   \\
+28 & X & X & X &  X & X  & 4   & 4   \\
+29 & X & X & X & -- & -- & 5   & 5   \\
+30 & X & X & X &  X & X  & 5   & 5   \\
+31 & X & X & X &  X & X  & 5   & 5   \\
+32 & X & X & X & -- & -- & 5 C & 5 C \\
+33 & - & - & - & -- & -- & GND & GND  \\
+34 & X & X & X & -- & -- & 6 C & 2   \\
+35 & X & X & X &  X & X  & 6   & 2   \\
+36 & X & X & X &  X & X  & 6   & 5   \\
+37 & X & X & X &  X & X  & 6   & 5   \\
+38 & - & - & - & -- & -- & F5 & F5 \\
+39 & X & - & X & -- & -- & Spare & Spare \\
+40 & - & - & - & -- & -- & F5 & F5 \\
+\end{tabular}
+\caption{Pin-out of ADA AddOn and cable between FPGA and CB.}
+\end{table}
+
+
+\begin{table}[ht]
+\small
+ \centering
+\begin{tabular}{c|c|c|c|cc|cc|c|c|c|c}
+ & \multicolumn{2}{c|}{\textbf{single}} & \multicolumn{5}{c|}{\textbf{differ.}} &
+\multicolumn{4}{c}{\textbf{Groups}}\\
+\textbf{Pair} & \textbf{I} & \textbf{O} & \textbf{I} & \multicolumn{4}{c|}{\textbf{O}} & \textbf{Con
+1} & \textbf{Con 2} & \textbf{Con 3} & \textbf{Con 4}\\
+\hline
+1  & X & X & X & -- & -- & X  & -- & 0   & 0   & 0   & 0   \\
+2  & X & X & X & -- & X  & X  & X  & 0   & 0   & 0   & 0   \\
+3  & X & X & X & X  & X  & -- & -- & 0   & 0   & 0 C & 0   \\
+4  & X & X & X & -- & -- & -- & -- & 0 C & 0 C & 0   & 0 C \\
+5  & X & X & X & X  & -- & X  & -- & 0   & 0   & 0   & 0   \\
+6  & X & - & X & X  & X  & -- & X  & 0   & 0   & 0   & 0   \\
+7  & X & X & X & -- & -- & -- & -- & 1   & 1   & 1   & 1   \\
+8  & X & X & X & X  & X  & X  & X  & 1   & 1   & 1   & 1   \\
+9  & X & X & X & -- & -- & X  & X  & 1   & 1   & 1   & 1   \\
+10 & X & X & X & -- & -- & -- & -- & 1 C & 1 C & 1 C & 1 C \\
+11 & X & X & X & X  & X  & X  & -- & 1   & 1   & 1   & 1   \\
+12 & X & X & X & X  & X  & -- & X  & 1   & 1   & 1   & 1   \\
+13 & X & X & X & -- & -- & X  & -- & 2   & 2   & 2   & 2   \\
+14 & X & X & X & -- & -- & -- & X  & 2   & 2 C & 2   & 2   \\
+15 & X & X & X & -- & -- & X  & X  & 2 C & 2   & 2   & 2   \\
+16 & X & X & X & -- & -- & -- & -- & 2   & 3   & 2 C & 2 C \\
+17 & X & X & X & -- & -- & -- & -- &     &     &     &    \\
+18 & X & X & X & X  & X  & X  & X  &     &     &     &    \\
+19 & X & X & X & X  & X  & X  & X  &     &     &     &    \\
+20 & X & X & X & X  & X  & X  & X  &     &     &     &    \\
+
+\end{tabular}
+\caption{Pin-out of 4-conn AddOn and cable between FPGA and CB.}
+\end{table}
+
+
 \end{document}