CVeS: ----------------------------------------------------------------------

diff --git a/tdc_releases/tdc_v0.2/prj_file/trb3_periph.prj b/tdc_releases/tdc_v0.2/prj_file/trb3_periph.prj
index 04879c9676e3f95395f5e94f3c49ae225dfde6d3..b36aeec0c48f15ea8d253791edd8a7f775ca65e9 100644 (file)
--- a/tdc_releases/tdc_v0.2/prj_file/trb3_periph.prj
+++ b/tdc_releases/tdc_v0.2/prj_file/trb3_periph.prj
@@ -142,11 +142,7 @@ add_file -vhdl -lib "work" "source/Adder_304.vhd"
 add_file -vhdl -lib "work" "source/bit_sync.vhd"
 add_file -vhdl -lib "work" "source/Channel.vhd"
 add_file -vhdl -lib "work" "source/corell.vhd"
-
 add_file -vhdl -lib "work" "source/Encoder_304_Bit.vhd"
-#add_file -vhdl -lib "work" "source/Encoder_304_ROMsuz.vhd"
-#add_file -vhdl -lib "work" "source/Encoder_304_Sngl_ROMsuz.vhd"
-
 add_file -vhdl -lib "work" "source/FIFO_32x512_OutReg.vhd"
 add_file -vhdl -lib "work" "source/pll_100_in_5_out.vhd"
 add_file -vhdl -lib "work" "source/Reference_channel.vhd"
@@ -156,7 +152,6 @@ add_file -vhdl -lib "work" "source/Reference_channel.vhd"
 add_file -vhdl -lib "work" "source/ROM_encoder_3.vhd"
 
 add_file -vhdl -lib "work" "source/ROM_FIFO.vhd"
-
 add_file -vhdl -lib "work" "source/TDC.vhd"
 add_file -vhdl -lib "work" "source/trb3_periph.vhd"
 add_file -vhdl -lib "work" "source/up_counter.vhd"