add explicit inital value for register

diff --git a/code/trb3sc_tools.vhd b/code/trb3sc_tools.vhd
index f5b3e4a9ad1dcbba25b1a4bb45d9d800c03fde3f..1f96992bec98313ab276ef92524509345d91b9c6 100644 (file)
--- a/code/trb3sc_tools.vhd
+++ b/code/trb3sc_tools.vhd
@@ -87,7 +87,7 @@ signal flash_cs_s, flash_clk_s, flash_out_s  : std_logic;
 
 signal debug_rx, debug_tx : std_logic;
 signal debug_status : std_logic_vector(31 downto 0);
-signal additional_reg_i : std_logic_vector(31 downto 0);
+signal additional_reg_i : std_logic_vector(31 downto 0) := x"00000000";
 signal control_reg_i    : std_logic_vector(15 downto 0);
 
 begin