change of Trigger Connection, AW

diff --git a/combiner/combiner.vhd b/combiner/combiner.vhd
index 872fceb1d2041ca54add42e5d06503193b0782a7..1ffb95fbc44ff6286cdd71a9a3dd004d3c8d363e 100644 (file)
--- a/combiner/combiner.vhd
+++ b/combiner/combiner.vhd
@@ -12,11 +12,10 @@ use work.trb_net16_hub_func.all;
 use work.trb_net_gbe_components.all;
 use work.med_sync_define.all;
 
-
 entity combiner is
   port(
     CLOCK_PCLK           : in    std_logic; 
-    CLOCK_PLL            : in    std_logic; 
+    CLOCK_PLL            : in    std_logic;
 
     TRIGGER_IN           : in    std_logic;
     TRIGGER_OUT          : out   std_logic;
@@ -26,8 +25,13 @@ entity combiner is
     RJ_CLOCK             : inout std_logic_vector( 3 downto 0); --1 not available here
     RJ_TRIG              : inout std_logic_vector( 2 downto 1); --0,3 not available here
     POWER_BOARD_IO       : inout std_logic_vector( 4 downto 1);
-    RJ45_SIG             : in    std_logic_vector( 5 downto 1);
-
+    RJ45_SIG_1           : in    std_logic;
+    RJ45_SIG_2           : out    std_logic;
+    RJ45_SIG_3           : out    std_logic;
+    RJ45_SIG_4           : out    std_logic;
+    RJ45_SIG_5           : out    std_logic;
+    --RJ45_SIG             : in    std_logic_vector( 5 downto 2);
+    
     --Lines to slaves
     BACK_MASTER_READY    : out   std_logic_vector(12 downto 1); --sig_1
     BACK_SLAVE_READY     : in    std_logic_vector(12 downto 1); --sig_2
@@ -560,7 +564,8 @@ end generate;
   LED_RJ_RED           <= (not reset_i or led_off_i) & (not trigger_select_i(1) or led_off_i);
   
 
-  TRIGGER_SEL_OUT <= not trigger_select_i;
+  TRIGGER_SEL_OUT(1) <= not trigger_select_i(0); -- older version: not
+  TRIGGER_SEL_OUT(2) <= trigger_select_i(1); -- older version: not
   BACK_LDO_EN <= not enable_ldo_i;
   BACK_SPARE <= (others => 'Z'); --this is programn on dirich!
   
@@ -580,6 +585,7 @@ end generate;
 ---------------------------------------------------------------------------  
 
   TRIGGER_TO_CTS <= trig_gen_out_i(0);
+  TRIGGER_OUT    <= RJ45_SIG_1;
   
   monitor_inputs_i(11 downto  0) <= BACK_TRIG1;
   monitor_inputs_i(23 downto 12) <= BACK_TRIG2;