]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
Adding debugging register for onewire (0x9).
authorJan Michel <j.michel@gsi.de>
Tue, 27 Oct 2015 17:04:14 +0000 (18:04 +0100)
committerJan Michel <j.michel@gsi.de>
Tue, 27 Oct 2015 17:04:14 +0000 (18:04 +0100)
Connecting temperature information to output of endpoint_full_handler_record.

trb_net16_endpoint_hades_full.vhd
trb_net16_endpoint_hades_full_handler.vhd
trb_net16_endpoint_hades_full_handler_record.vhd
trb_net_components.vhd
trb_net_onewire.vhd
trb_net_std.vhd

index 5a2f23499ca9933ee6c3de217b789b7acf094c4b..86bda83807389cd57420f1d544bcf41490e05313 100644 (file)
@@ -145,6 +145,7 @@ entity trb_net16_endpoint_hades_full is
     LOCAL_TIME_OUT            : out std_logic_vector(7 downto 0);  --local time running with chip frequency
     TIME_SINCE_LAST_TRG_OUT   : out std_logic_vector(31 downto 0); --local time, resetted with each trigger
     TIMER_TICKS_OUT           : out std_logic_vector(1 downto 0);  --bit 1 ms-tick, 0 us-tick
+    TEMPERATURE_OUT           : out std_logic_vector(11 downto 0);
     --Debugging & Status information
     STAT_DEBUG_IPU            : out std_logic_vector (31 downto 0);
     STAT_DEBUG_1              : out std_logic_vector (31 downto 0);
@@ -236,6 +237,7 @@ architecture trb_net16_endpoint_hades_full_arch of trb_net16_endpoint_hades_full
   signal ONEWIRE_DATA            :  std_logic_vector(15 downto 0);
   signal ONEWIRE_ADDR            :  std_logic_vector(2 downto 0);
   signal ONEWIRE_WRITE           :  std_logic;
+  signal buf_stat_onewire        :  std_logic_vector(31 downto 0);
 
   signal buf_COMMON_STAT_REG_STROBE :  std_logic_vector((std_COMSTATREG)-1 downto 0);
   signal buf_COMMON_CTRL_REG_STROBE :  std_logic_vector((std_COMCTRLREG)-1 downto 0);
@@ -653,7 +655,8 @@ begin
 
 
             REGIO_IDRAM_DATA_OUT <= (others => '0');
-
+            STAT_ONEWIRE <= buf_stat_onewire;
+            
             onewire_interface : trb_net_onewire
               generic map(
                 USE_TEMPERATURE_READOUT => c_YES,
@@ -670,7 +673,7 @@ begin
                 ADDR_OUT => ONEWIRE_ADDR,
                 WRITE_OUT=> ONEWIRE_WRITE,
                 TEMP_OUT => temperature,
-                STAT     => STAT_ONEWIRE
+                STAT     => buf_stat_onewire
                 );
           end generate;
           gen_1wire_monitor : if REGIO_USE_1WIRE_INTERFACE = c_MONITOR generate
@@ -689,7 +692,7 @@ begin
                 ADDR_OUT => ONEWIRE_ADDR,
                 WRITE_OUT=> ONEWIRE_WRITE,
                 TEMP_OUT => temperature,
-                STAT     => STAT_ONEWIRE
+                STAT     => buf_stat_onewire
                 );
           end generate;
         end generate;
@@ -828,6 +831,7 @@ begin
       buf_COMMON_STAT_REG_IN(191 downto 184) <= buf_LVL1_TRG_CODE_OUT;
       buf_COMMON_STAT_REG_IN(271 downto 192) <= stat_counters_lvl1_handler;
       buf_COMMON_STAT_REG_IN(287 downto 272) <= (others => '0');
+      buf_COMMON_STAT_REG_IN(319 downto 288) <= buf_stat_onewire;
     end process;
 
 
@@ -1062,7 +1066,8 @@ begin
   CTRL_REG_STROBE                <= buf_CTRL_REG_STROBE;
 
   TIMER_TICKS_OUT                <= buf_TIMER_TICKS_OUT;
-
+  TEMPERATURE_OUT                <= temperature;
+  
   buf_CTRL_GEN                   <= IOBUF_CTRL_GEN;
   REGIO_COMMON_CTRL_REG_OUT      <= buf_REGIO_COMMON_CTRL_REG_OUT;
 
index f795e686de888270db4015e3782a6b063aaa86bb..820f1175b0e1bb39f54aba53d4bdaf31058a4c38 100644 (file)
@@ -122,6 +122,7 @@ entity trb_net16_endpoint_hades_full_handler is
     TIME_LOCAL_OUT               : out std_logic_vector ( 7 downto 0); --local time running with chip frequency
     TIME_SINCE_LAST_TRG_OUT      : out std_logic_vector (31 downto 0); --local time, resetted with each trigger
     TIME_TICKS_OUT               : out std_logic_vector ( 1 downto 0); --bit 1 ms-tick, 0 us-tick
+    TEMPERATURE_OUT              : out std_logic_vector (11 downto 0);
 
     --Debugging & Status information
     STAT_DEBUG_IPU               : out std_logic_vector (31 downto 0);
@@ -357,6 +358,7 @@ begin
       LOCAL_TIME_OUT             => time_local_i,
       TIME_SINCE_LAST_TRG_OUT    => time_since_last_trg_i,
       TIMER_TICKS_OUT            => time_ticks_i,
+      TEMPERATURE_OUT            => TEMPERATURE_OUT,
 
       STAT_DEBUG_IPU             => open,
       STAT_DEBUG_1               => open,
index f760237d2403a5b8d7ce533603693da1990ab3bc..18469d32de7336d763b74e3ae576c29d713d7d6f 100644 (file)
@@ -127,7 +127,9 @@ architecture trb_net16_endpoint_hades_full_handler_record_arch of trb_net16_endp
   signal time_local_i            : std_logic_vector ( 7 downto 0);
   signal time_since_last_trg_i   : std_logic_vector (31 downto 0);
   signal time_ticks_i            : std_logic_vector ( 1 downto 0);
+  signal temperature_i           : std_logic_vector (11 downto 0);
 
+  
   signal buf_fee_data_almost_full_out : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0);
   signal stat_handler_i          : std_logic_vector (127 downto 0);
   signal stat_data_buffer_level  : std_logic_vector (DATA_INTERFACE_NUMBER*32-1 downto 0);
@@ -267,6 +269,7 @@ begin
       LOCAL_TIME_OUT             => time_local_i,
       TIME_SINCE_LAST_TRG_OUT    => time_since_last_trg_i,
       TIMER_TICKS_OUT            => time_ticks_i,
+      TEMPERATURE_OUT            => temperature_i,
 
       STAT_DEBUG_IPU             => open,
       STAT_DEBUG_1               => open,
@@ -285,6 +288,7 @@ TIMERS_OUT.clock        <= time_local_i;
 TIMERS_OUT.last_trigger <= time_since_last_trg_i;
 TIMERS_OUT.tick_ms      <= time_ticks_i(1);
 TIMERS_OUT.tick_us      <= time_ticks_i(0);
+TIMERS_OUT.temperature  <= temperature_i;
       
 ---------------------------------------------------------------------------
 -- RegIO Bus Handler
index 441f48c3fb624655d5c75621ba96f7d2b19bfd99..09df8708f2418d40c8bf7cb226678bfaa32fd4e0 100644 (file)
@@ -729,7 +729,7 @@ end component;
       REGIO_ONEWIRE_MONITOR_OUT : out   std_logic;\r
       REGIO_VAR_ENDPOINT_ID     : in    std_logic_vector(15 downto 0)                            := (others => '0');\r
       MY_ADDRESS_OUT            : out std_logic_vector(15 downto 0);\r
-      \r
+      TEMPERATURE_OUT           : out std_logic_vector(11 downto 0);\r
       GLOBAL_TIME_OUT         : out std_logic_vector(31 downto 0);  --global time, microseconds\r
       LOCAL_TIME_OUT          : out std_logic_vector(7 downto 0);  --local time running with chip frequency\r
       TIME_SINCE_LAST_TRG_OUT : out std_logic_vector(31 downto 0);  --local time, resetted with each trigger\r
@@ -862,6 +862,7 @@ end component;
       TIME_LOCAL_OUT          : out std_logic_vector (7 downto 0);  --local time running with chip frequency\r
       TIME_SINCE_LAST_TRG_OUT : out std_logic_vector (31 downto 0);  --local time, resetted with each trigger\r
       TIME_TICKS_OUT          : out std_logic_vector (1 downto 0);  --bit 1 ms-tick, 0 us-tick\r
+      TEMPERATURE_OUT         : out std_logic_vector(11 downto 0);\r
 \r
       --Debugging & Status information\r
       STAT_DEBUG_IPU              : out std_logic_vector (31 downto 0);\r
index 8c0c801b456e29a6a3f86497baed4488f57224dd..e09ac059b57e3d336c0d1e438ef20f627a6098a8 100644 (file)
@@ -37,6 +37,7 @@ architecture trb_net_onewire_arch of trb_net_onewire is
                    WRITE_START, WRITE_WAIT, READ_BIT, READ_READ_ROM, SEND_CONV_TEMP,
                    READ_CONV_TEMP, SEND_READ_TEMP, READ_READ_TEMP);
   signal state, next_state : state_t;
+  signal state_bits : std_logic_vector(3 downto 0);
   signal timecounter : integer range 0 to MAX_COUNTER;
   signal bitcounter  : integer range 0 to 127;
   signal bitcounter_vector : std_logic_vector(6 downto 0);
@@ -381,6 +382,22 @@ begin
     end if;
   end process;
 
+  state_bits <= x"0" when state = START else
+                x"1" when state = IDLE else
+                x"2" when state = SEND_RESET else
+                x"3" when state = WAIT_AFTER_RESET else
+                x"4" when state = SEND_ROM_COMMAND else
+                x"5" when state = READ_WAIT else
+                x"6" when state = WRITE_START else
+                x"7" when state = WRITE_WAIT else
+                x"8" when state = READ_BIT else
+                x"9" when state = READ_READ_ROM else
+                x"a" when state = SEND_CONV_TEMP else
+                x"b" when state = READ_CONV_TEMP else
+                x"c" when state = SEND_READ_TEMP else
+                x"d" when state = READ_READ_TEMP else
+                x"F";
+
 
   STAT(0) <= '0';
   STAT(1) <= '0' when input = '0' else '1';
@@ -391,7 +408,9 @@ begin
   STAT(6) <= reading_temp;
   STAT(7) <= buf_STAT;
   STAT(11 downto 8) <= bitcounter_vector(3 downto 0);
-  STAT(31 downto 12) <= (others => '0');
+  STAT(15 downto 12)<= state_bits;
+  STAT(16)<= next_strong_pullup;
+  STAT(31 downto 17) <= (others => '0');
 
 end architecture;
 
index 80c41818e15548a63a506d18ee7c3c123e97414f..b8209861b0d8fc929c406f953022739444ae091f 100644 (file)
@@ -111,7 +111,7 @@ package trb_net_std is
 
 --common registers
   --maximum: 4, because of regio implementation
-  constant std_COMSTATREG  : integer := 9;
+  constant std_COMSTATREG  : integer := 10;
   constant std_COMCTRLREG  : integer := 3;
     --needed address width for common registers
   constant std_COMneededwidth : integer := 4;
@@ -204,6 +204,7 @@ package trb_net_std is
     tick_ms             : std_logic;
     tick_us             : std_logic;
     network_address     : std_logic_vector (15 downto 0);
+    temperature         : std_logic_vector (11 downto 0);
   end record;
     
   type MED2INT is record