*** empty log message ***

diff --git a/etrax_interface.vhd b/etrax_interface.vhd
index 82791bc9e315313ad566dcb8d5d21c6a81567f3b..d0a1fe63d2cc95180155d323be0862a19028a448 100644 (file)
--- a/etrax_interface.vhd
+++ b/etrax_interface.vhd
@@ -263,7 +263,7 @@ begin
           elsif INTERNAL_DATAREADY_IN = '1' then
             saved_data_fpga <= INTERNAL_DATA_IN;
           end if;
-        elsif write_cycle = '1' and ETRAX_RW_STATE_currentstate = WAIT_FOR_DATA then
+        elsif write_cycle = '1' and ETRAX_RW_STATE_currentstate = SEND_EXTERNAL_TRIGGER then
           if saved_address(4) = '1' then
             buf_FPGA_REGISTER_OUT((ctrl_num+1)*32-1 downto (ctrl_num)*32) <= saved_data;
           end if;

diff --git a/media_interfaces/ecp2m_fot/msg_file.log b/media_interfaces/ecp2m_fot/msg_file.log
index 0c28f43b6deb33f734a3a047d6db9198064007ce..b208e4d5ee512c79ac33f14763c88a91bd400619 100644 (file)
--- a/media_interfaces/ecp2m_fot/msg_file.log
+++ b/media_interfaces/ecp2m_fot/msg_file.log
@@ -1,13 +1,13 @@
-    Module Name: serdes_fot_full_quad
+    Module Name: serdes_fot_full_quad_ctc
     Core Name: PCS
-    LPC file : serdes_fot_full_quad.lpc
-    Parameter File : serdes_fot_full_quad.pp
-    Command line: /opt/lattice/ispLEVER7.1/isptools/ispfpga/bin/lin/orcapp -Fmaco serdes_fot_full_quad.pp
+    LPC file : serdes_fot_full_quad_ctc.lpc
+    Parameter File : serdes_fot_full_quad_ctc.pp
+    Command line: /opt/lattice/ispLEVER7.2/isptools/ispfpga/bin/lin/orcapp -Fmaco serdes_fot_full_quad_ctc.pp
     Return Value:
     
     
- Module PCS has been generated in /home/janm/jspc22/med_interface/ecp2m_fot/. successfully!
+ Module PCS has been generated in /home/hadaq/jan/cvs/trbnet/media_interfaces/ecp2m_fot/. successfully!
 
-/home/janm/.isplever_lin/ispcpld/bin/vhd2naf -tfi -mod serdes_fot_full_quad -ext readme -out serdes_fot_full_quad -p /opt/lattice/ispLEVER7.1/isptools/ispcpld/generic -tpl serdes_fot_full_quad.tft serdes_fot_full_quad.vhd
+/home/hadaq/.isplever_lin/ispcpld/bin/hdl2jhd -tfi -mod serdes_fot_full_quad_ctc -ext readme -out serdes_fot_full_quad_ctc -tpl serdes_fot_full_quad_ctc.tft serdes_fot_full_quad_ctc.vhd
 
 Done successfully!

diff --git a/pinout/mdc_oep3.lpf b/pinout/mdc_oep3.lpf
index e8c508c4b71fdee0e916a1df1287188fb634d562..2919135558bbaf0dff6a0ed5a91da9ed6968cd01 100644 (file)
--- a/pinout/mdc_oep3.lpf
+++ b/pinout/mdc_oep3.lpf
@@ -63,6 +63,8 @@ IOBUF  PORT  "COM_STOP_P" IO_TYPE=LVDS25;
   IOBUF PORT   "DATA_FF" IO_TYPE=LVTTL33 PULLMODE=DOWN ;
   LOCATE COMP  "MRES"       SITE "P1";
   IOBUF PORT   "MRES"    IO_TYPE=LVTTL33 PULLMODE=UP ;
+  LOCATE COMP  "CS_1"        SITE "E12";
+  LOCATE COMP  "CS_2"        SITE "F11";
 
 #################################################################
 #Misc TTL Ports

diff --git a/trb_net_components.vhd b/trb_net_components.vhd
index f5f9736e6126d88a51e86e6b56104ee64609c335..8261b9ecdc1ccf0fc46bada6d044891ba1814079 100644 (file)
--- a/trb_net_components.vhd
+++ b/trb_net_components.vhd
@@ -902,6 +902,45 @@ package trb_net_components is
 
 
 
+  component trb_net16_med_ecp_fot_4_ctc is
+    generic(
+      REVERSE_ORDER : integer range 0 to 1 := c_NO
+    --  USED_PORTS : std_logic-vector(3 downto 0) := "1111"
+      );
+    port(
+      CLK    : in std_logic;
+      CLK_25 : in std_logic;
+      CLK_EN : in std_logic;
+      RESET  : in std_logic;
+
+      --Internal Connection
+      MED_DATA_IN        : in  std_logic_vector(c_DATA_WIDTH*4-1 downto 0);
+      MED_PACKET_NUM_IN  : in  std_logic_vector(c_NUM_WIDTH*4-1 downto 0);
+      MED_DATAREADY_IN   : in  std_logic_vector(3 downto 0);
+      MED_READ_OUT       : out std_logic_vector(3 downto 0);
+      MED_DATA_OUT       : out std_logic_vector(c_DATA_WIDTH*4-1 downto 0);
+      MED_PACKET_NUM_OUT : out std_logic_vector(c_NUM_WIDTH*4-1 downto 0);
+      MED_DATAREADY_OUT  : out std_logic_vector(3 downto 0);
+      MED_READ_IN        : in  std_logic_vector(3 downto 0);
+
+      --SFP Connection
+      TXP : out std_logic_vector(3 downto 0);
+      TXN : out std_logic_vector(3 downto 0);
+      RXP : in  std_logic_vector(3 downto 0);
+      RXN : in  std_logic_vector(3 downto 0);
+      SD  : in  std_logic_vector(3 downto 0);
+
+      -- Status and control port
+      STAT_OP            : out  std_logic_vector (63 downto 0);
+      CTRL_OP            : in  std_logic_vector (63 downto 0);
+      STAT_DEBUG         : out  std_logic_vector (255 downto 0);
+      CTRL_DEBUG         : in  std_logic_vector (63 downto 0)
+      );
+  end component;
+
+
+
+
 
   component trb_net16_med_ecp_sfp is
     generic(