Config and testbench updates

diff --git a/ADC/sim/tb_adcprocessor.vhd b/ADC/sim/tb_adcprocessor.vhd
index 72baa329c482062db8b7a4aedd33b6912cd657a9..5b26c3f098c01b73e8cde8f61673760f04390f5e 100644 (file)
--- a/ADC/sim/tb_adcprocessor.vhd
+++ b/ADC/sim/tb_adcprocessor.vhd
@@ -96,8 +96,8 @@ clock <= not clock after 5 ns;
 config.trigger_enable    <= x"0000_0000_0000", x"ffff_ffff_fff1" after 5 us;
 config.baseline_always_on <= '0'; --'1', '0' after 10 us;
 
-config.processing_mode   <= 1;
-config.buffer_depth      <= to_unsigned(24 ,11);
+config.processing_mode   <= 2;
+config.buffer_depth      <= to_unsigned(128 ,11);
 config.samples_after     <= to_unsigned(8  ,11);
 config.block_count       <= to_unsigned(2   , 2); 
 config.trigger_threshold <= to_unsigned(40  ,18);
@@ -121,6 +121,8 @@ config.channel_disable <= (others => '0');
 config.check_word1     <= (others => '0');
 config.check_word2     <= (others => '0');
 config.check_word_enable <= '0';
+config.cfd_window <= to_unsigned(50, 8);
+config.cfd_delay <= to_unsigned(1, 4);
 
 
 readout_rx.valid_notiming_trg <= '0';

diff --git a/ADC/source/adc_handler.vhd b/ADC/source/adc_handler.vhd
index f2dace2788cf1cf2d7d589d44b378f4faabd620f..129cd01accc3e8f08de65a0b35ff6604778c8488 100644 (file)
--- a/ADC/source/adc_handler.vhd
+++ b/ADC/source/adc_handler.vhd
@@ -267,6 +267,8 @@ PROC_BUS : process begin
         when x"1a" =>  BUS_TX.data(31 downto 0) <=  config.channel_disable(31 downto  0);
         when x"1b" =>  BUS_TX.data(15 downto 0) <=  config.channel_disable(47 downto 32);
         when x"1c" =>  BUS_TX.data(1 downto 0) <= std_logic_vector(to_unsigned(config.processing_mode,2));
+        when x"1d" =>  BUS_TX.data(7 downto 0) <= std_logic_vector(config.cfd_window);
+        when x"1e" =>  BUS_TX.data(3 downto 0) <= std_logic_vector(config.cfd_delay);
         when others => BUS_TX.ack <= '0'; BUS_TX.unknown <= '1';
       end case;
     elsif BUS_RX.addr >= x"0020" and BUS_RX.addr <= x"002f" then      
@@ -318,6 +320,8 @@ PROC_BUS : process begin
         when x"1a" =>   config.channel_disable(31 downto  0) <=  BUS_RX.data(31 downto 0);
         when x"1b" =>   config.channel_disable(47 downto 32) <=  BUS_RX.data(15 downto 0);
         when x"1c" =>   config.processing_mode <= to_integer(unsigned(BUS_RX.data(1 downto 0)));
+        when x"1d" =>   config.cfd_window      <= unsigned(BUS_RX.data(7 downto 0));
+        when x"1e" =>   config.cfd_delay       <= unsigned(BUS_RX.data(3 downto 0));
         when others => BUS_TX.ack <= '0'; BUS_TX.unknown <= '1';        
       end case;
     elsif BUS_RX.addr >= x"0020" and BUS_RX.addr <= x"002f" then