--- /dev/null
+<?xml version="1.0"?>
+<MAPS type="MIMOSA26">
+<register
+ name="CONTROL_PIX_REG"
+ id="13"
+ size="40" >
+ <description>
+The CONTROL_PIX_REG registers are 40 bits large; they allow setting parameters of the readout controller. These
+registers are reserved for sensor's debugging by the IPHC/IRFU group. A end user has to respect to the default values.
+\t</description>
+<field
+ name="NU"
+ start="36"
+ end="39"
+ size="4"
+ defaultValue="0" >
+ <description>Reserved, Not Used </description>
+</field>
+<field
+ name="SelPad1"
+ start="33"
+ end="35"
+ size="3"
+ defaultValue="0" >
+ <description>Selection bit of Test1Pad </description>
+</field>
+<field
+ name="SelPad2"
+ start="30"
+ end="32"
+ size="3"
+ defaultValue="0" >
+ <description>Selection bit of Test2Pad </description>
+</field>
+<field
+ name="RowMkLast"
+ start="20"
+ end="29"
+ size="10"
+ defaultValue="0x023F" >
+ <description>Row number of the frame. It depends of readout mode. When the En_HalfMatrx mode is active, the value is 0x013F otherwise 0x023F. When the En_LineMarker mode is active, add two rows at the end of matrix. </description>
+</field>
+<field
+ name="RowMkd"
+ start="10"
+ end="19"
+ size="10"
+ defaultValue="0" >
+ <description>Selection parameter of row for digital marker (MK_Test_D) </description>
+</field>
+<field
+ name="RowMka"
+ start="0"
+ end="9"
+ size="10"
+ defaultValue="0" >
+ <description>Selection parameter of row for analogue marker (MK_Test_A) </description>
+</field>
+</register>
+<register
+ name="CONTROL_SUZE_REG"
+ id="17"
+ size="48" >
+ <description>
+The CONTROL_SUZE_REG registers are 48 bits large; they allow setting parameters of the readout controller for SUZE.
+We suggest an end user to only use default values except for data stream output parameters
+\t</description>
+<field
+ name="NU"
+ start="46"
+ end="47"
+ size="2"
+ defaultValue="0" >
+ <description>Reserved, Not Used </description>
+</field>
+<field
+ name="SelPad4"
+ start="43"
+ end="45"
+ size="3"
+ defaultValue="0" >
+ <description>Selection bit of Test4Pad </description>
+</field>
+<field
+ name="SelPad3"
+ start="40"
+ end="42"
+ size="3"
+ defaultValue="0" >
+ <description>Selection bit of Test3Pad </description>
+</field>
+<field
+ name="En_auto_scan_discri"
+ start="39"
+ end="39"
+ size="1"
+ defaultValue="0" >
+ <description>Enable mode scan test discriminators, all matrix </description>
+</field>
+<field
+ name="En_scan"
+ start="38"
+ end="38"
+ size="1"
+ defaultValue="0" >
+ <description>Enable mode scan test</description>
+</field>
+<field
+ name="Test_after_mux"
+ start="37"
+ end="37"
+ size="1"
+ defaultValue="0" >
+ <description>Enable mode scan test for multiplexer of SUZE </description>
+</field>
+<field
+ name="entestdatadisc"
+ start="36"
+ end="36"
+ size="1"
+ defaultValue="0" >
+ <description>Enable mode scan test discriminators</description>
+</field>
+<field
+ name="RowLastSuze"
+ start="26"
+ end="35"
+ size="10"
+ defaultValue="0x023F" >
+ <description>Row number of the frame. It depends of readout mode. When the En_HalfMatrx mode is active, the value is 0x013F otherwise 0x023F. When the En_LineMarker mode is active, add two rows at the end of matrix. </description>
+</field>
+<field
+ name="ScanLineTst"
+ start="16"
+ end="25"
+ size="10"
+ defaultValue="0" >
+ <description>Selection parameter of row for digital </description>
+</field>
+<field
+ name="dualchannelout"
+ start="15"
+ end="15"
+ size="1"
+ defaultValue="0" >
+ <description>Determines the data stream on the channel or in one channel </description>
+</field>
+<field
+ name="clkrateout"
+ start="14"
+ end="14"
+ size="1"
+ defaultValue="0" >
+ <description>Determines the clock rate of the outputs channel or in one channel </description>
+</field>
+<field
+ name="jsupinitmem"
+ start="13"
+ end="13"
+ size="1"
+ defaultValue="1" >
+ <description>Authorizes the initialization test of the FIFO or not. High level active. </description>
+</field>
+<field
+ name="disckgmodgate"
+ start="12"
+ end="12"
+ size="1"
+ defaultValue="0" >
+ <description>Discriminator switched ON/Off </description>
+</field>
+<field
+ name="cfgwr"
+ start="9"
+ end="11"
+ size="3"
+ defaultValue="0" >
+ <description>Cf. cfg multiplexors configuration </description>
+</field>
+<field
+ name="cfgdata"
+ start="6"
+ end="8"
+ size="3"
+ defaultValue="0" >
+ <description>Idem </description>
+</field>
+<field
+ name="cfgcs"
+ start="3"
+ end="5"
+ size="3"
+ defaultValue="0" >
+ <description>Idem </description>
+</field>
+<field
+ name="cfadr"
+ start="0"
+ end="2"
+ size="3"
+ defaultValue="0" >
+ <description>Idem </description>
+</field>
+</register>
+<register
+ name="DAC_BIAS"
+ id="0F"
+ size="152" >
+ <description>
+(a.k.a. BIAS_DAC)
+The BIAS_DAC register is 152 bit wide; it sets simultaneously the 19 DAC registers.
+As show bellow these 8-bit DACs set voltage and current bias. After reset the register is set to 0, a value which fixes the
+minimum power consumption of the circuit. The current values of the DACs are read while the new values are downloaded
+during the access to the register. An image of the value of each DAC can be measured on its corresponding test pad.
+\t</description>
+<field
+ name="IKIMO"
+ start="144"
+ end="151"
+ size="8"
+ defaultValue="100" >
+ <description>External circuit monitoring Vtest</description>
+</field>
+<field
+ name="IPIX"
+ start="136"
+ end="143"
+ size="8"
+ defaultValue="50" >
+ <description>Pixel source follower bias IPIX</description>
+</field>
+<field
+ name="IDIS2"
+ start="128"
+ end="135"
+ size="8"
+ defaultValue="32" >
+ <description>Discriminator bias 2 IDIS2</description>
+</field>
+<field
+ name="IDIS1"
+ start="120"
+ end="127"
+ size="8"
+ defaultValue="32" >
+ <description>Discriminator bias 1 IDIS1</description>
+</field>
+<field
+ name="IVDREF2"
+ start="112"
+ end="119"
+ size="8"
+ defaultValue="118" >
+ <description>Discriminator Reference 2 VDREF2</description>
+</field>
+<field
+ name="IVDREF1A"
+ start="104"
+ end="111"
+ size="8"
+ defaultValue="128" >
+ <description>Discriminator Reference 1 (Bank A) VDREF1A</description>
+</field>
+<field
+ name="IVDREF1B"
+ start="96"
+ end="103"
+ size="8"
+ defaultValue="128" >
+ <description>Discriminator Reference 1 (Bank B) VDREF1B</description>
+</field>
+<field
+ name="IVDREF1C"
+ start="88"
+ end="95"
+ size="8"
+ defaultValue="128" >
+ <description>Discriminator Reference 1 (Bank C) VDREF1C</description>
+</field>
+<field
+ name="IVDREF1D"
+ start="80"
+ end="87"
+ size="8"
+ defaultValue="128" >
+ <description>Discriminator Reference 1 (Bank D) VDREF1D</description>
+</field>
+<field
+ name="IAnaBUF"
+ start="72"
+ end="79"
+ size="8"
+ defaultValue="50" >
+ <description>Analogue Buffer bias IAnaBUF</description>
+</field>
+<field
+ name="IVTST2"
+ start="64"
+ end="71"
+ size="8"
+ defaultValue="118" >
+ <description>Test Level, emulates a pixel output </description>
+</field>
+<field
+ name="IVTST1"
+ start="56"
+ end="63"
+ size="8"
+ defaultValue="128" >
+ <description>IDEM </description>
+</field>
+<field
+ name="ILVDS"
+ start="48"
+ end="55"
+ size="8"
+ defaultValue="32" >
+ <description>LVDS PAD bias </description>
+</field>
+<field
+ name="ILVDSTX"
+ start="40"
+ end="47"
+ size="8"
+ defaultValue="40" >
+ <description>LVDS PAD bias </description>
+</field>
+<field
+ name="ID2PWRS"
+ start="32"
+ end="39"
+ size="8"
+ defaultValue="10" >
+ <description>Discriminator bias 2 (mode low consp.) </description>
+</field>
+<field
+ name="ID1PWRS"
+ start="24"
+ end="31"
+ size="8"
+ defaultValue="10" >
+ <description>Discriminator bias 1 (mode low consp.) </description>
+</field>
+<field
+ name="IBufBias"
+ start="16"
+ end="23"
+ size="8"
+ defaultValue="10" >
+ <description>Ref&Tst Buffer bias </description>
+</field>
+<field
+ name="IPwrSWBias"
+ start="8"
+ end="15"
+ size="8"
+ defaultValue="10" >
+ <description>Discriminator Power Pulse bias </description>
+</field>
+<field
+ name="ICLPDISC"
+ start="0"
+ end="7"
+ size="8"
+ defaultValue="100" >
+ <description>Discriminator Clamping bias </description>
+</field>
+</register>
+<register
+ name="DIS_DISCRI"
+ id="11"
+ size="1152" >
+ <description>
+The DIS_DISCRI register is 1152 bits large. The purpose of this register is to disable the discriminator on a specific
+column if it is noisy, by gating Latch signal and setting the output discriminator at 0.
+The default value of the DIS_DISCRI register is 0; it means that all discriminators are activated. Setting a bit to 1 disables
+the corresponding discriminator. In MIMOSA26, the DisableLatch<0> is on the left hand side while DisableLatch<1151>
+is on the right hand side.
+\t</description>
+<field
+ name="DisDiscri"
+ start="0"
+ end="1151"
+ size="1152"
+ defaultValue="0" >
+ <description>disables discriminators (whole columns)</description>
+</field>
+</register>
+<register
+ name="HEADER_REG"
+ id="16"
+ size="64" >
+ <description>
+The register called Header_Reg includes 4 registers of 16 bits as shown below.
+
+For both modes according to the register DUALCHANNEL the header and the trailer of each data frame can be
+different. The following table shows the possible Header and the Trailer which ensure the unicity in the data frame. The
+unicity is guaranteed without the Frame counter.
+\t</description>
+<field
+ name="header0"
+ start="48"
+ end="63"
+ size="16"
+ defaultValue="0x5555" >
+ <description>Synchronisation header for serial output0 </description>
+</field>
+<field
+ name="header1"
+ start="32"
+ end="47"
+ size="16"
+ defaultValue="0x5555" >
+ <description>Synchronisation header for serial output1 </description>
+</field>
+<field
+ name="trailer0"
+ start="16"
+ end="31"
+ size="16"
+ defaultValue="0xAAAA" >
+ <description>Synchronisation trailer serial output0 </description>
+</field>
+<field
+ name="trailer1"
+ start="0"
+ end="15"
+ size="16"
+ defaultValue="0xAAAA" >
+ <description>Synchronisation trailer serial output1</description>
+</field>
+</register>
+<register
+ name="LINEPAT0_REG"
+ id="10"
+ size="1152" >
+ <description>
+The LINEPAT0_REG register is 1152 bits large. The purpose of this register is to emulate discriminators outputs rows in
+En_LineMarker and Pattern_Only modes.
+When Pattern_Only is active, the values stored in the pixel matrix are ignored and the value of LINEPAT0_REG
+is sent to the output. This is a test mode which emulates the (digital) pixel response with the contents programmed into the
+LINEPAT0_REG register in order to verify the digital processing. The pattern is alternated with the contents of the
+LINEPAT1_REG.
+In the En_LineMarker mode, it adds two rows at the end of matrix for a readout chip and the LINEPATL0_REG
+register is read to emulate the discriminators outputs of these two supplementary rows.
+After the initialisation phase (reset), this register is preset to 0.
+
+In MIMOSA26, the LinePatL0Reg <0> is on the left hand side while LinePatL0Reg <1151> is on the right hand side.
+\t</description>
+<field
+ name="LinePatL0Reg"
+ start="0"
+ end="1151"
+ size="1152"
+ defaultValue="0" >
+ <description>Emulate discriminators rows</description>
+</field>
+</register>
+<register
+ name="LINEPAT1_REG"
+ id="14"
+ size="1152" >
+ <description>
+The LINEPAT1_REG register is 1152 bits large. The purpose of this register is to emulate discriminators outputs rows in
+En_LineMarker and Pattern_Only modes.
+When Pattern_Only is active, the values stored in the pixel matrix are ignored and the value of LINEPAT1_REG
+is sent to the output. This is a test mode which emulates the (digital) pixel response with the contents programmed into the
+LINEPAT0_REG register in order to verify the digital processing. The pattern is alternated with the contents of the
+LINEPAT1_REG.
+In the En_LineMarker mode, it adds two rows at the end of matrix for a readout chip and the LINEPATL1_REG
+register is read to emulate the discriminators outputs of these two supplementary rows.
+
+In MIMOSA26, the LinePatL1Reg <0> is on the left hand side while LinePatL1Reg <1151> is on the right hand side.
+With Line1_PAT_REG together these two signals will form the elements of the simulated frame given to SUZE part.
+\t</description>
+<field
+ name="LinePatL1Reg"
+ start="0"
+ end="1151"
+ size="1152"
+ defaultValue="0" >
+ <description>Emulate discriminators rows</description>
+</field>
+</register>
+<register
+ name="RO_MODE0"
+ id="1E"
+ size="8" >
+ <description>
+The RO_MODE0 registers are 8 bits large; they allow the user to select specific digital mode of the chip.
+
+(1) The minimum wide of asynchronous external START signal is 500 ns, and this signal is active at high level.
+(2) When En_ExtStart is disabled, it’s possible to generate internal START by accessing JTAG_Start bit. JTAG_Start
+signal is realized by three JTAG access: First step, this bit is set to 0, second step it is set to 1, and at last it is set to 0.
+\t</description>
+<field
+ name="EnVDiscriTestDigital"
+ start="7"
+ end="7"
+ size="1"
+ defaultValue="0" >
+ <description>Enable the internal injection of VTEST</description>
+</field>
+<field
+ name="En_HalfMatrx"
+ start="6"
+ end="6"
+ size="1"
+ defaultValue="0" >
+ <description>Set the row shift register to 320 in place of 576 bits. </description>
+</field>
+<field
+ name="DisLVDS"
+ start="5"
+ end="5"
+ size="1"
+ defaultValue="0" >
+ <description>Disable LVDS and active clock CMOS.</description>
+</field>
+<field
+ name="En_LineMarker"
+ start="4"
+ end="4"
+ size="1"
+ defaultValue="0" >
+ <description>Add two rows at the end of matrix for a chip Readout: The LINEPAT_REG register is selected to emulate discriminators outputs. For analogue outputs, the 2 Test Levels, VTEST1 and VTEST2 are selected which emulate a pixel output.</description>
+</field>
+<field
+ name="MODE_SPEAK"
+ start="3"
+ end="3"
+ size="1"
+ defaultValue="0" >
+ <description>Select Marker signal or Readout Clock for digital and analogue data (MK_CLKA and MK_CLKD pads)</description>
+</field>
+<field
+ name="Pattern_Only"
+ start="2"
+ end="2"
+ size="1"
+ defaultValue="0" >
+ <description>Test Mode: Select LINEPAT_REG to emulate discriminators outputs</description>
+</field>
+<field
+ name="En_ExtStart"
+ start="1"
+ end="1"
+ size="1"
+ defaultValue="0" >
+ <description>Enable external START input synchronisation (1)</description>
+</field>
+<field
+ name="JTAG_Start"
+ start="0"
+ end="0"
+ size="1"
+ defaultValue="0" >
+ <description>Enable Jtag START input synchronisation (2)</description>
+</field>
+</register>
+<register
+ name="RO_MODE1"
+ id="1D"
+ size="8" >
+ <description>
+The RO_MODE1 registers are 8 bits large; they allow selecting specific analogue mode of the chip.
+\t</description>
+<field
+ name="startframe"
+ start="7"
+ end="7"
+ size="1"
+ defaultValue="0" >
+ <description>Reinitializes the frame counter to 0. </description>
+</field>
+<field
+ name="EnTestAnalog"
+ start="6"
+ end="6"
+ size="1"
+ defaultValue="0" >
+ <description>Enable analog output </description>
+</field>
+<field
+ name="EnAnaDriverScan"
+ start="5"
+ end="5"
+ size="1"
+ defaultValue="0" >
+ <description>Enable scan pixel mode </description>
+</field>
+<field
+ name="DisBufRef"
+ start="4"
+ end="4"
+ size="1"
+ defaultValue="0" >
+ <description>Disable the internal reference </description>
+</field>
+<field
+ name="EnPll"
+ start="3"
+ end="3"
+ size="1"
+ defaultValue="0" >
+ <description>Enable internal PLL </description>
+</field>
+<field
+ name="EnDiscriAOP"
+ start="2"
+ end="2"
+ size="1"
+ defaultValue="0" >
+ <description>Enable the Power pulse Amplifier </description>
+</field>
+<field
+ name="EnDiscriPwrSave"
+ start="1"
+ end="1"
+ size="1"
+ defaultValue="0" >
+ <description>Enable the discri power pulse mode</description>
+</field>
+<field
+ name="EnTestDiscri"
+ start="0"
+ end="0"
+ size="1"
+ defaultValue="0" >
+ <description>Enable the discri. test mode</description>
+</field>
+</register>
+<register
+ name="SEQUENCER_PIX_REG"
+ id="12"
+ size="128" >
+ <description>
+The SEQUENCER_PIX_REG registers are 128 bits large; this register contains all parameters to generate readout pixel
+and discriminator sequence.
+\t</description>
+<field
+ name="DataRdPix"
+ start="112"
+ end="127"
+ size="16"
+ defaultValue="0xFFFF" >
+ <description>Connect pixel output to common column </description>
+</field>
+<field
+ name="DataRst1"
+ start="96"
+ end="111"
+ size="16"
+ defaultValue="0x0040" >
+ <description>Set reference voltage for diode </description>
+</field>
+<field
+ name="DataClp"
+ start="80"
+ end="95"
+ size="16"
+ defaultValue="0x01C0" >
+ <description>Set reference voltage for clamping </description>
+</field>
+<field
+ name="DataCalib"
+ start="64"
+ end="79"
+ size="16"
+ defaultValue="0x3C00" >
+ <description>Sample after clamping </description>
+</field>
+<field
+ name="DataRdDsc"
+ start="48"
+ end="63"
+ size="16"
+ defaultValue="0x001C" >
+ <description>Sample before clamping </description>
+</field>
+<field
+ name="DataLatch"
+ start="32"
+ end="47"
+ size="16"
+ defaultValue="0x6000" >
+ <description>Latch state of the discriminator </description>
+</field>
+<field
+ name="DataPwrOn"
+ start="0"
+ end="31"
+ size="32"
+ defaultValue="0xFFFFFFFF" >
+ <description>Activate power supply for pixel </description>
+</field>
+</register>
+<register
+ name="SEQUENCER_SUZE_REG"
+ id="15"
+ size="160" >
+ <description>
+The SEQUENCER_SUZE_REG registers are 160 bits large; this register contains all parameters to generate readout zero
+suppression (SUZE) sequence.
+\t</description>
+<field
+ name="dckreadpixmux"
+ start="144"
+ end="159"
+ size="16"
+ defaultValue="0x0555" >
+ <description>Sample signal for multiplexer after Priority look ahead </description>
+</field>
+<field
+ name="dcklatchhit"
+ start="128"
+ end="143"
+ size="16"
+ defaultValue="0x3000" >
+ <description>Synchronization signal every line for Priority Look Ahead </description>
+</field>
+<field
+ name="dcklatchhitmem"
+ start="112"
+ end="127"
+ size="16"
+ defaultValue="0x1000" >
+ <description>Synchronization signal every line for memory management </description>
+</field>
+<field
+ name="dckmemlatch"
+ start="96"
+ end="111"
+ size="16"
+ defaultValue="0x0555" >
+ <description>Synchronization signal every line for Priority Look Ahead </description>
+</field>
+<field
+ name="dckreadpix5ns"
+ start="80"
+ end="95"
+ size="16"
+ defaultValue="0x82AA" >
+ <description>Synchronization signal 6 times every line for memory management shifted of 5 ns compared with CkReadpix </description>
+</field>
+<field
+ name="dckreadpix"
+ start="64"
+ end="79"
+ size="16"
+ defaultValue="0x0555" >
+ <description>Synchronization signal 6 times every line for memory management </description>
+</field>
+<field
+ name="dstartingline"
+ start="48"
+ end="63"
+ size="16"
+ defaultValue="0xE001" >
+ <description>Synchronization signal every line for memory management </description>
+</field>
+<field
+ name="drstline"
+ start="32"
+ end="47"
+ size="16"
+ defaultValue="0x6000" >
+ <description>Synchronization signal every line for all SUZE part </description>
+</field>
+<field
+ name="drstpix"
+ start="16"
+ end="31"
+ size="16"
+ defaultValue="0x0555" >
+ <description>Reset signal 6 times every line for Priority Look Ahead </description>
+</field>
+<field
+ name="drstframe"
+ start="0"
+ end="15"
+ size="16"
+ defaultValue="0x2000" >
+ <description>Reset frame signal for memory management </description>
+</field>
+</register>
+</MAPS>
--- /dev/null
+#!/usr/bin/perl -w
+print "Content-type: text/html\n\n";
+
+my $me="cgitest.pl";
+
+use strict;
+use warnings;
+use XML::LibXML;
+use POSIX;
+
+
+
+sub initPage {
+
+print <<EOF;
+<HTML>
+<HEAD>
+<title>CGI Testrange</title>
+<link href="styles.css" rel="stylesheet" type="text/css"/>
+EOF
+printJavaScripts();
+print <<EOF;
+</HEAD>
+<BODY>
+
+<div id="roterBereich">
+<input type="button" onClick="getdata('$me?print=spectree','roterBereich');" value="show spectree">
+</div>
+<div id="blauerBereich">
+<input type="button" onClick="getdata('$me?print=settree','blauerBereich');" value="show settree">
+</div>
+
+
+
+
+
+</BODY>
+</HTML>
+EOF
+
+}
+
+
+
+my %cgiHash = &read_input;
+
+
+if (!keys %cgiHash) { # if script is called without arguments: initialize the html structure
+ initPage();
+ exit;
+}
+
+
+my $parser = XML::LibXML->new();
+my $specfile = "./MIMOSA26_JTAG_SPEC.xml";
+
+
+my $setfile = "./settings.xml";
+
+
+
+
+
+
+if ($cgiHash{'print'} eq 'spectree') {
+print_registers($specfile);
+}
+
+
+if ($cgiHash{'print'} eq 'settree') {
+print_registers($setfile);
+}
+
+
+
+
+
+
+
+
+#################### SUBLAND ######################
+
+
+sub print_registers {
+my $xmlfile = $_[0];
+my $xmltree = $parser->parse_file($xmlfile);
+my @registers = $xmltree->findnodes("/MAPS/register");
+print "<table>";
+for my $register ( @registers ){
+
+ my $registerName = $register->findvalue("./\@name");
+ my $registerId = $register->findvalue("./\@id");
+ my $registerSize = $register->findvalue("./\@size");
+
+ my $flistid = $xmlfile.$registerName;
+
+ print "<tr>";
+
+ print <<EOF;
+<td onClick='toggleVis("$flistid")' bgcolor="lightgrey">+</td>
+EOF
+ print "<td>$registerName</td>";
+ #print "<td>$registerId</td>";
+
+
+ print "</tr>";
+ #print "<tr>";
+
+ print '<tr id="'.$flistid.'" bgcolor="#dea" style="visibility:collapse">';
+ print '<td></td>';
+ print '<td>';
+ print_fields($xmlfile,$register);
+ print "</td>";
+ print "</tr>";
+}
+print "</table>";
+}
+
+sub print_fields {
+
+ my $register = $_[1];
+ my $xmlfile = $_[0];
+ my $registerName = $register->findvalue("./\@name");
+ my @fields = $register->findnodes("./field");
+ print "<table>";
+ for my $field (@fields){
+ my $fieldName = $field->findvalue("./\@name");
+ my $readOnlyFlag = 0;
+ my $fieldValue = $field->findvalue("./\@value");
+ my $fieldId = $xmlfile."//".$registerName."/".$fieldName;
+ if ($fieldValue eq "") {
+ $fieldValue = $field->findvalue("./\@defaultValue");
+ $readOnlyFlag=1;
+ }
+
+ print "<tr>";
+ print "<td width=120>$fieldName</td>";
+ print "<td> = </td>";
+ if ($readOnlyFlag){
+ print <<EOF;
+ <td width=120 bgcolor='white' align='right'>$fieldValue</td>
+EOF
+ } else {
+ print <<EOF;
+<td align='right'>
+<input type='text' align='right' value='$fieldValue' onchange='alert("$fieldId")' >
+</td>
+EOF
+ #print '<td id="SaveBtn'.$fieldId.'" style="visibility:visible">';
+ #print <<EOF;
+ #<input type="button" value="save">
+#EOF
+ print '</td>';
+ }
+ print "</tr>";
+ }
+ print "</table>";
+
+}
+
+
+sub read_input
+{
+ my $buffer; my @pairs; my $pair; my $name; my $value;my %FORM;
+ # Read in text
+ $ENV{'REQUEST_METHOD'} =~ tr/a-z/A-Z/;
+ if ($ENV{'REQUEST_METHOD'} eq "POST")
+ {
+ read(STDIN, $buffer, $ENV{'CONTENT_LENGTH'});
+ } else
+ {
+ $buffer = $ENV{'QUERY_STRING'};
+ }
+ # Split information into name/value pairs
+ @pairs = split(/&/, $buffer);
+ foreach $pair (@pairs)
+ {
+ ($name, $value) = split(/=/, $pair);
+ $value =~ tr/+/ /;
+ $value =~ s/%(..)/pack("C", hex($1))/eg;
+ $FORM{$name} = $value;
+ }
+ %FORM;
+}
+
+
+
+sub printJavaScripts {
+
+
+####### javascript function land ################
+
+
+print <<EOF ;
+
+<script language="javascript">
+function toggleVis(elementId) {
+if( document.getElementById(elementId).style.visibility == "visible") {
+ document.getElementById(elementId).style.visibility = "collapse";
+} else {
+ document.getElementById(elementId).style.visibility = "visible" ;
+}
+}
+function showElement(elementId) {
+ document.getElementById(elementId).style.visibility = "visible" ;
+}
+function hideElement(elementId) {
+ document.getElementById(elementId).style.visibility = "hidden" ;
+}
+function collapseElement(elementId) {
+ document.getElementById(elementId).style.visibility = "collapse" ;
+}
+
+</script>
+
+<script language="javascript">
+function getdata(command,destId) {
+ var xmlhttp = null;
+ //var cb = null;
+ xmlhttp=new XMLHttpRequest();
+ //cb = callback;
+ //var destId = dId;
+
+ xmlhttp.onreadystatechange = function() {
+ if(xmlhttp.readyState == 4) {
+ //if(cb)
+ if(document.getElementById(destId).innerHTML){
+ document.getElementById(destId).innerHTML = xmlhttp.responseText;
+ }
+ //cb(xmlhttp.responseText);
+ //document.getElementById(destId).innerHTML = xmlhttp.responseText;
+ }
+ }
+ xmlhttp.open("GET",command,true);
+ xmlhttp.send(null);
+ }
+</script>
+EOF
+
+}
--- /dev/null
+[General]
+IRLEN=5
+BYPASSREG=1F
+[Data]
+; format: Key= Register number ( arbitrary, sorted by), Value=IR( hexadecimal, lower bits are used)","length(bits,decimal)","DR(hexadecimal)
+; configuration taken from CCMOS_SCTRL_MIMOSA26_JTAG_config_files.org/daq_test_2x80Mhz_1_chip_hit_fe55.TXT
+;00=0F,152,006432020276FFAAFFFF32768020280A0A0A0A64 ; BIAS_DAC assumed 19*8bit
+00=0F,152,00643220204D0000000032768020280A0A0A0A64 ; BIAS_DAC assumed 19*8bit
+;00=0F,152,0064322020731005100532768020280A0A0A0A64 ; BIAS_DAC assumed 19*8bit ==> resulted in almost constant 1
+01=1E,8,00000002 ; RO_MODE0"cmS50r
+;1=1E,8,00000012 ; RO_MODE0, En_LineMarker
+;1=1E,8,00000006 ; RO_MODE0, Pattern_Only=1
+02=1D,8,00000000 ; RO_MODE1, basic configuration value
+03=13,40,0000000023F00000; CTRL_PIX_REG, basic configuration value
+04=12,128,7FFF004001C03C00001C60007FFFFFFF ; SEQUENCER_PIX_REG, basic configuration value
+05=16,64,5555555580018001 ; HEADER_TRAILER_REG, assumed 4*16bit
+;06=17,48,00000048FC01E000 ; CTRL_SUZE_REG: dualchannelout, clkrateout, En_scan=1, entestdatadisc = 0, En_auto_scan_discri=0, Test_after_mux = 0, ScanLineTst=0x001 (10bit)
+;06=17,48,000000C90401E000 ; CTRL_SUZE_REG: dualchannelout, clkrateout, En_scan=1, entestdatadisc = 0, En_auto_scan_discri=1, Test_after_mux = 0, ScanLineTst=0x001 (10bit)
+06=17,48,00000008FC00E000 ; CTRL_SUZE_REG: dualchannelout, clkrateout
+;06=17,48,000000090400E000 ; CTRL_SUZE_REG: dualchannelout, clkrateout, RowLastSuze incremented by two
+;06=17,48,00000008FC00F000 ; CTRL_SUZE_REG: dualchannelout, clkrateout, disckgmodgate=1
+07=15,160,055530001000055582AA0555E001600005552000 ; SEQUENCER_SUZE_REG, basic configuration value
+08=11,1152,055555555000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ; DIS_DISCRI
+09=10,1152,000003333000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033310000 ; LINE0_PATTERN_REG
+10=14,1152,1646464641111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111116F6F6FFF1 ; LINE1_PATTERN_REG
+;11=18,144,7ABD1E6F278BC01208038180a0401808035C ; CTRL_8B10B_REG0 assumed 16*9bit: 15C, 001, 002, 003, 004, 005, 006, 007, 008, 009, 0F0, 0F1, 0F2, 0F3, 0F4, 0F5
+;12=19,312,0080d5400d5755d5755d5755d5755d5755d575500255061221200800169223980f60a06882a06330 ; CTRL_8B10B_REG1, assumed 312*1bit
+
+
+
+
--- /dev/null
+#!/usr/bin/perl -w
+
+use strict;
+use warnings;
+use XML::LibXML;
+
+my $parser = XML::LibXML->new();
+
+my $doc1 = $ARGV[0];
+my $doc2 = $ARGV[1];
+
+my $xml1 = $parser->parse_file($doc1);
+my $xml2 = $parser->parse_file($doc2);
+
+my $new_xml = XML::LibXML::Element->new( 'XML' );
+$new_xml->appendWellBalancedChunk( $xml1->documentElement()->toString() );
+$new_xml->appendWellBalancedChunk( $xml2->documentElement()->toString() );
+print $new_xml->toString(1);
--- /dev/null
+#!/usr/bin/perl -w
+
+use strict;
+use warnings;
+use XML::LibXML;
+
+my $parser = XML::LibXML->new();
+
+my $doc1 = $ARGV[0];
+
+my $xml1 = $parser->parse_file($doc1);
+
+
+my $query = "//register/field[\@name='NU']";
+
+my @nodes = $xml1->findnodes($query);
+
+for my $node ( @nodes) {
+my $parentnode = $node->parentNode;
+my @attributelist = $node->attributes();
+print $parentnode->nodeName(),"->",$node->nodeName(), ": ", $node->textContent(), "\n";
+for my $attribute ( @attributelist) {
+ print $attribute->name."\t".$attribute->value."\n";
+}
+
+}
--- /dev/null
+<?xml version="1.0"?>
+<MAPS type="MIMOSA26">
+<register name="CONTROL_PIX_REG">
+<field name="NU" value="0"/>
+</register>
+
+<register name="DIS_DISCRI">
+ <field name="DisDiscri" value="1000"/>
+</register>
+</MAPS>
--- /dev/null
+
+body {
+ color: black; background-color: white;
+ font-family: Helvetica,Arial,sans-serif;
+ font-size: 12;
+ margin: 0; padding: 1em;
+}
+
+table {
+ font-size: 12;
+}
+
+#roterBereich {
+ position:absolute;
+ top:130px;
+ left:30px;
+ width:320px;
+ padding:10px;
+ margin:0px;
+ border:2px solid #EE0000;
+}
+#blauerBereich {
+ position:absolute;
+ top:130px;
+ left:400px;
+ width:320px;
+ padding:10px;
+ margin:0px;
+ border:2px solid #0000EE;
+}
+
+input[type="text"]
+{
+ font-size:12px;
+ height:20px;
+ width:120px;
+}
+
+input[type="button"]
+{
+ font-size:12px;
+ height:20px;
+}
--- /dev/null
+#!/bin/bash
+
+here=$(pwd)
+
+cd ../MIMOSA26_Registers
+./GenerateSpecFile.sh | tee "$here/MIMOSA26_JTAG_SPEC.xml"
+
+cd "$here"
--- /dev/null
+#!/usr/bin/perl -w
+
+use strict;
+use warnings;
+use XML::LibXML;
+use POSIX;
+
+my $parser = XML::LibXML->new();
+
+my $specfile = "./MIMOSA26_JTAG_SPEC.xml";
+my $spectree = $parser->parse_file($specfile);
+
+my $setfile = "./settings.xml";
+my $settree = $parser->parse_file($setfile);
+
+my @registers = $spectree->findnodes("/MAPS/register");
+
+
+
+my $specMapsType = $spectree->findvalue("/MAPS/\@type");
+my $setMapsType = $settree->findvalue("/MAPS/\@type");
+
+# check if specification file and settings file are compatible
+if ($specMapsType ne $setMapsType) {
+ die "MAPS type mismatch between settings and specification file!\n";
+}
+
+
+
+
+
+my $registerCounter = 0;
+for my $register ( @registers){
+
+ register2hex($register);
+ $registerCounter++;
+}
+
+#print $new_xml->toString(1);
+
+
+sub register2hex {
+# TODO
+# try catch blocks?
+# good work so far
+ my $register = $_[0];
+ my $registerName = $register->findvalue("./\@name");
+ my $registerId = $register->findvalue("./\@id");
+ my $registerSize = $register->findvalue("./\@size");
+ my $stringSize = ceil($registerSize/32)*8;
+
+
+ my $result = 0;
+
+ my @fields = $register->findnodes("./field");
+
+ for my $field (@fields){
+ my $name = $field->findvalue("./\@name");
+ my $start = $field->findvalue("./\@start");
+ my $end = $field->findvalue("./\@end");
+ my $size = $field->findvalue("./\@size");
+
+ # check for setting in the settings file
+ my $value = $settree->findvalue("/MAPS/register[\@name='".$registerName."']/field[\@name='".$name."']/\@value");
+ if ($value ne "") {
+ #print "Setting found! $value\n";
+ } else { # if nothing found, then use the default value from the specfile
+ $value = $field->findvalue("./\@defaultValue");
+ #print "Use default setting: $value\n";
+ }
+
+ $value = any2dec($value); # convert any numeric code to decimal
+ my $calcedsize = $end-$start+1;
+ if ( $calcedsize != $size) {
+ die "start/stop/size mismatch in register $registerName : field $name\n";
+ }
+ #print "$name: $start -> $end = $calcedsize/$size\n";
+ $result = $result | ($value<<$start);
+ #print "value: $value\n";
+ }
+ my $resultstring = sprintf("%0".$stringSize."X",$result);
+ print ";$registerName\n";
+ printf ("%02d=%s,%d,%s\n",$registerCounter,$registerId,$registerSize,$resultstring);
+
+}
+
+
+sub any2dec { # converts numeric expressions 0x, 0b or decimal to decimal
+
+ my $argument = $_[0];
+ #print "any2dec input argument $argument\n";
+
+ if ( $argument =~ m/0[bxBX]/) {
+ return oct $argument;
+ } else {
+ return $argument;
+ }
+}
jspc29 / mvdsensorcontrol.git / commitdiff