add constraint for DSP slice

diff --git a/releases/tdc_v2.3/unimportant_lines_constraints.lpf b/releases/tdc_v2.3/unimportant_lines_constraints.lpf
index b36d3813b2d0e2565a0600fa2562c4e219e429d7..8a2cbd4e33a7a3c99a7b222d65778f3cc2e3d388 100644 (file)
--- a/releases/tdc_v2.3/unimportant_lines_constraints.lpf
+++ b/releases/tdc_v2.3/unimportant_lines_constraints.lpf
@@ -22,9 +22,9 @@ MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_pre*" 4 x;
 MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_post*" 4 x;
 MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_pr*" 4 x;
 MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_pos*" 4 x;
-MULTICYCLE TO CELL "THE_TDC/TheReadout/un4_tw_pos*" 4 x;
-MULTICYCLE TO PORT "THE_TDC/TheReadout/un4_tw_pos*" 4 x;
-MULTICYCLE TO ASIC "THE_TDC/TheReadout/un4_tw_post[39:0]" PIN "*" 4 x; 
+#MULTICYCLE TO CELL "THE_TDC/TheReadout/un4_tw_pos*" 4 x;
+#MULTICYCLE TO PORT "THE_TDC/TheReadout/un4_tw_pos*" 4 x;
+MULTICYCLE TO ASIC "THE_TDC/TheReadout/un4_tw_post[39:0]" PIN "*" 20 ns; 
 
 MULTICYCLE FROM CELL "THE_TDC/hit_edge[*]" TO CELL "THE_TDC/GEN_Channels.*.Channels/Channel200/memory_ram" 2.000000 X ;