]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/commitdiff
*** empty log message ***
authorhadeshyp <hadeshyp>
Wed, 24 Aug 2011 13:40:04 +0000 (13:40 +0000)
committerhadeshyp <hadeshyp>
Wed, 24 Aug 2011 13:40:04 +0000 (13:40 +0000)
base/clockmanager/CM1.jed [new file with mode: 0644]
base/clockmanager/CM1.pac [new file with mode: 0644]
base/clockmanager/CM2.jed [new file with mode: 0644]
base/clockmanager/CM2.pac [new file with mode: 0644]

diff --git a/base/clockmanager/CM1.jed b/base/clockmanager/CM1.jed
new file mode 100644 (file)
index 0000000..095a3e5
--- /dev/null
@@ -0,0 +1,29 @@
+\ 2 \r
+*\r
+NOTE Version:           PAC-Designer 6.1.0 *\r
+NOTE Copyright (C), 1995-2011, Lattice Semiconductor Corporation. *\r
+NOTE All Rights Reserved *\r
+NOTE DATE CREATED:      8/24/2011 *\r
+NOTE DESIGN NAME:       CM1.PAC *\r
+NOTE DEVICE NAME:       ispPAC-CLK5410D *\r
+NOTE PIN ASSIGNMENTS *\r
+\r
+\r
+\r
+QF420*\r
+QP64*\r
+G0*\r
+F0*\r
+L00000 110011111111111111111110010111111111111111*\r
+L00042 110011011111010000001111110110000011111111*\r
+L00084 100011011111110000001110101110000001011111*\r
+L00126 110011011111110000001111000110000001011111*\r
+L00168 100011011111010000001111101110000001011111*\r
+L00210 110010011100101000001111100110000000000111*\r
+L00252 100000011100000000001111101110000000011111*\r
+L00294 110000011111001000001111011110000010000111*\r
+L00336 100000011100000000001111111110000010011111*\r
+L00378 100000011111001111111111111111011110011111*\r
+C1C8C*\r
+U11111111111111111111111111111111*\r
+\ 3B32F
\ No newline at end of file
diff --git a/base/clockmanager/CM1.pac b/base/clockmanager/CM1.pac
new file mode 100644 (file)
index 0000000..12a9314
--- /dev/null
@@ -0,0 +1,125 @@
+<?xml version="1.0"?>\r
+\r
+<PacDesignData>\r
+\r
+<DocFmtVersion>1</DocFmtVersion>\r
+<DeviceType>ispPAC-CLK5410D</DeviceType>\r
+\r
+<CreatedBy>PAC-Designer 6.1.0</CreatedBy>\r
+\r
+<FuseMap>11111111111101010100111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111011111111111110111111111101011001100000111000111101010101000000000000000000000000000000000000000000000001101010100000000000000001000100010001000100010001000100010001111111111111111111111000000000000000000100100000100000100000100000000000000000100000000001111111100000111111111111111111111111111111111111111111111111111111111111111111111111101100100000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111000000000000000000000000000000000000000000000000000000000000000000000000011111111111111111111111111111111</FuseMap>\r
+\r
+<SecurityFuse>0</SecurityFuse>\r
+\r
+<SummaryInformation>\r
+<Title></Title>\r
+<Subject></Subject>\r
+<Author>Unknown User</Author>\r
+<Keywords>ispPAC-CLK5410D</Keywords>\r
+<Comments>\r
+<![CDATA[\r
+]]>\r
+</Comments>\r
+</SummaryInformation>\r
+\r
+<GeneralPurposeLogicEnvOption>\r
+   <PACMode>0</PACMode>\r
+   <HDLMode>0</HDLMode>\r
+   <PreferSynthesis>0</PreferSynthesis>\r
+   <PROJName></PROJName>\r
+   <PROJDIR></PROJDIR>\r
+</GeneralPurposeLogicEnvOption>\r
+\r
+<RemoteFileList>\r
+</RemoteFileList>\r
+\r
+<SymbolicSchematicData>\r
+  <Symbol>\r
+    <SymKey>153</SymKey>\r
+    <NameText>Profile 0 Ref Frequency</NameText>\r
+    <Value>125.0000MHz</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>891</SymKey>\r
+    <NameText>OEw</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>892</SymKey>\r
+    <NameText>OEx</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>893</SymKey>\r
+    <NameText>OEy</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>894</SymKey>\r
+    <NameText>OEz</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>881</SymKey>\r
+    <NameText>OE0</NameText>\r
+    <Value>1</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>882</SymKey>\r
+    <NameText>OE1</NameText>\r
+    <Value>1</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>883</SymKey>\r
+    <NameText>OE2</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>884</SymKey>\r
+    <NameText>OE3</NameText>\r
+    <Value>1</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>885</SymKey>\r
+    <NameText>OE4</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>886</SymKey>\r
+    <NameText>OE5</NameText>\r
+    <Value>1</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>887</SymKey>\r
+    <NameText>OE6</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>888</SymKey>\r
+    <NameText>OE7</NameText>\r
+    <Value>1</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>889</SymKey>\r
+    <NameText>OE8</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>890</SymKey>\r
+    <NameText>OE9</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>339</SymKey>\r
+    <NameText>ispCLK Performance Grade</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>596</SymKey>\r
+    <NameText>ispCLK Feedback Output Pin</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+</SymbolicSchematicData>\r
+\r
+</PacDesignData>\r
+\r
diff --git a/base/clockmanager/CM2.jed b/base/clockmanager/CM2.jed
new file mode 100644 (file)
index 0000000..ae2b937
--- /dev/null
@@ -0,0 +1,29 @@
+\ 2 \r
+*\r
+NOTE Version:           PAC-Designer 6.1.0 *\r
+NOTE Copyright (C), 1995-2011, Lattice Semiconductor Corporation. *\r
+NOTE All Rights Reserved *\r
+NOTE DATE CREATED:      8/24/2011 *\r
+NOTE DESIGN NAME:       CM2.PAC *\r
+NOTE DEVICE NAME:       ispPAC-CLK5410D *\r
+NOTE PIN ASSIGNMENTS *\r
+\r
+\r
+\r
+QF420*\r
+QP64*\r
+G0*\r
+F0*\r
+L00000 100011111111101111111110010111111110111111*\r
+L00042 100011011111000000001111110110000011111111*\r
+L00084 100011011111110000001110101110000000011111*\r
+L00126 100011011111100000001111001110000001011111*\r
+L00168 100011011111010000001111101110000001011111*\r
+L00210 100010011100001000001111100110000000000111*\r
+L00252 100010011100000000001111101110000000000111*\r
+L00294 100000011100001000001111011110000010000111*\r
+L00336 100000011100000000001111111110000010000111*\r
+L00378 100000011100001111111111011111011110000111*\r
+C18EE*\r
+U11111111111111111111111111111111*\r
+\ 3B320
\ No newline at end of file
diff --git a/base/clockmanager/CM2.pac b/base/clockmanager/CM2.pac
new file mode 100644 (file)
index 0000000..2a81549
--- /dev/null
@@ -0,0 +1,125 @@
+<?xml version="1.0"?>\r
+\r
+<PacDesignData>\r
+\r
+<DocFmtVersion>1</DocFmtVersion>\r
+<DeviceType>ispPAC-CLK5410D</DeviceType>\r
+\r
+<CreatedBy>PAC-Designer 6.1.0</CreatedBy>\r
+\r
+<FuseMap>11111111110000000000111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111011111111111110111111111101001001100000111000111101010100000000000000000000000000000000000000000000000000000000000000000000000001000100010001000100010001000100010001111111111111101010100000000000000000000000000000000000000000000000000000100000100000000001111111100001111111111111111111111111111111111111111111111111111111111111111111111111101100100000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111000000000000000000000000000000000000000000000000000000000000000000000000011111111111111111111111111111111</FuseMap>\r
+\r
+<SecurityFuse>0</SecurityFuse>\r
+\r
+<SummaryInformation>\r
+<Title></Title>\r
+<Subject></Subject>\r
+<Author>Unknown User</Author>\r
+<Keywords>ispPAC-CLK5410D</Keywords>\r
+<Comments>\r
+<![CDATA[\r
+]]>\r
+</Comments>\r
+</SummaryInformation>\r
+\r
+<GeneralPurposeLogicEnvOption>\r
+   <PACMode>0</PACMode>\r
+   <HDLMode>0</HDLMode>\r
+   <PreferSynthesis>0</PreferSynthesis>\r
+   <PROJName></PROJName>\r
+   <PROJDIR></PROJDIR>\r
+</GeneralPurposeLogicEnvOption>\r
+\r
+<RemoteFileList>\r
+</RemoteFileList>\r
+\r
+<SymbolicSchematicData>\r
+  <Symbol>\r
+    <SymKey>153</SymKey>\r
+    <NameText>Profile 0 Ref Frequency</NameText>\r
+    <Value>200.0000MHz</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>891</SymKey>\r
+    <NameText>OEw</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>892</SymKey>\r
+    <NameText>OEx</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>893</SymKey>\r
+    <NameText>OEy</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>894</SymKey>\r
+    <NameText>OEz</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>881</SymKey>\r
+    <NameText>OE0</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>882</SymKey>\r
+    <NameText>OE1</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>883</SymKey>\r
+    <NameText>OE2</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>884</SymKey>\r
+    <NameText>OE3</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>885</SymKey>\r
+    <NameText>OE4</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>886</SymKey>\r
+    <NameText>OE5</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>887</SymKey>\r
+    <NameText>OE6</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>888</SymKey>\r
+    <NameText>OE7</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>889</SymKey>\r
+    <NameText>OE8</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>890</SymKey>\r
+    <NameText>OE9</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>339</SymKey>\r
+    <NameText>ispCLK Performance Grade</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+  <Symbol>\r
+    <SymKey>596</SymKey>\r
+    <NameText>ispCLK Feedback Output Pin</NameText>\r
+    <Value>0</Value>\r
+  </Symbol>\r
+</SymbolicSchematicData>\r
+\r
+</PacDesignData>\r
+\r