Update some constraints

diff --git a/releases/tdc_v2.3/Channel_200.vhd b/releases/tdc_v2.3/Channel_200.vhd
index 98a709a9eb7e87907afca1e34af8eba5d53ceddb..bff8f06ed49b20a153de864d2736033aa5fcfaaa 100644 (file)
--- a/releases/tdc_v2.3/Channel_200.vhd
+++ b/releases/tdc_v2.3/Channel_200.vhd
@@ -167,7 +167,11 @@ architecture Channel_200 of Channel_200 is
 
   attribute syn_keep                : boolean;
   attribute syn_keep of ff_array_en : signal is true;
+  attribute syn_keep of FSM_RD_STATE : signal is true;
 
+  attribute syn_hier : string;
+  attribute syn_hier of Channel_200 : architecture is "firm";
+  
 begin  -- Channel_200
 
   GEN_TrgWinEndTdcDist : if SIMULATION = 0 generate

diff --git a/releases/tdc_v2.3/up_counter.vhd b/releases/tdc_v2.3/up_counter.vhd
index 1d8a88778eed1483af0bbafa989390efe377a0c7..efd03dd119f742e3cf2ef71a0a24f0edc5a7d7bc 100644 (file)
--- a/releases/tdc_v2.3/up_counter.vhd
+++ b/releases/tdc_v2.3/up_counter.vhd
@@ -20,6 +20,9 @@ architecture up_counter of up_counter is
   signal counter                    : std_logic_vector (NUMBER_OF_BITS-1 downto 0);
   attribute syn_preserve            : boolean;
   attribute syn_preserve of counter : signal is true;
+  attribute syn_preserve of up_counter : architecture is true;
+  attribute syn_hier : string;
+  attribute syn_hier of up_counter : architecture is "hard";
 
 begin