signal timeout_counter_reset : std_logic_vector(POINT_NUMBER-1 downto 0);
signal connection_timed_out : std_logic_vector(POINT_NUMBER-1 downto 0);
+ signal saved_auto_reading_DHDR : std_logic_vector(POINT_NUMBER-1 downto 0);
+ signal last_REPLY_PACKET_NUM_IN : std_logic_vector(POINT_NUMBER*3-1 downto 0);
+
+
begin
----------------------------------
end process;
---Problematic stuff here... needing reply_packet_num_in to determine read_out ...
- PROC_auto_read_DHDR : process(current_reply_reading_DHDR, current_reply_reading_HDR, REPLY_PACKET_NUM_IN)
+
+ PROC_last_reply_packet_num : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if REPLY_DATAREADY_IN(i) = '1' and buf_REPLY_READ_OUT(i) = '1' then
+ last_REPLY_PACKET_NUM_IN(i*c_NUM_WIDTH+2 downto i*c_NUM_WIDTH) <= REPLY_PACKET_NUM_IN(i*c_NUM_WIDTH+2 downto i*c_NUM_WIDTH);
+ end if;
+ end if;
+ end process;
+
+
+ PROC_save_auto_reading_DHDR : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ saved_auto_reading_DHDR(i) <= reg_current_reply_auto_reading_DHDR(i);
+ end if;
+ end process;
+
+
+ PROC_auto_read_DHDR : process(reg_current_reply_reading_HDR, enable_packing,
+ last_REPLY_PACKET_NUM_IN, saved_auto_reading_DHDR)
begin
- if (reg_current_reply_reading_DHDR(i) = '1' and REPLY_PACKET_NUM_IN(i*c_NUM_WIDTH+1) = '0') --reg_
- or reg_current_reply_reading_HDR(i) = '1' then --reg_
+ reg_current_reply_auto_reading_DHDR(i) <= '0';
+ if reg_current_reply_reading_HDR(i) = '1' then
reg_current_reply_auto_reading_DHDR(i) <= '1';
- else
- reg_current_reply_auto_reading_DHDR(i) <= '0';
+ elsif reg_current_reply_reading_DHDR(i) = '1' then
+-- if enable_packing = '0' then
+ if last_REPLY_PACKET_NUM_IN(i*3+2 downto i*3) = c_F1
+ or last_REPLY_PACKET_NUM_IN(i*3+2 downto i*3) = c_F2
+ or last_REPLY_PACKET_NUM_IN(i*3+2 downto i*3) = c_F3 then
+ reg_current_reply_auto_reading_DHDR(i) <= '0';
+ else
+ reg_current_reply_auto_reading_DHDR(i) <= '1';
+ end if;
+-- else
+-- if last_REPLY_PACKET_NUM_IN(i*3+2 downto i*3) = c_F3 then
+-- reg_current_reply_auto_reading_DHDR(i) <= '0';
+-- else
+-- reg_current_reply_auto_reading_DHDR(i) <= '1';
+-- end if;
+-- end if;
end if;
end process;
end generate;
+
+-- if (reg_current_reply_reading_DHDR(i) = '1'
+-- and (last_REPLY_PACKET_NUM_IN(i*c_NUM_WIDTH+1) = '0')
+-- or reg_current_reply_reading_HDR(i) = '1' then
+-- reg_current_reply_auto_reading_DHDR(i) <= '1';
+-- else
+-- reg_current_reply_auto_reading_DHDR(i) <= '0';
+-- end if;
+
+
----------------------------------
--Check for Timeouts
----------------------------------
comb_REPLY_POOL_DATAREADY <= REPLY_POOL_next_read;
when c_F2 =>
comb_REPLY_POOL_DATAREADY <= '0';
- if not_reading_HDR = '1' then --implicit not waiting_for_reply
+ if not_reading_HDR = '1' and got_all_DHDR = '1' then --implicit not waiting_for_reply
next_state <= GEN_LENGTH;
next_reply_adder_start <= '1';
end if;
when GEN_LENGTH => --now, all HDR are stored, calc sum of HDR lengths
dhdr_addr <= "010";
- next_reply_adder_final_result <= std_logic_vector(unsigned(reply_adder_result) - number_of_replies + 2);
+-- if enable_packing = '0' then
+ next_reply_adder_final_result <= std_logic_vector(unsigned(reply_adder_result) - number_of_replies + 2);
+-- else
+-- next_reply_adder_final_result <= std_logic_vector(unsigned(reply_adder_result) - number_of_replies - number_of_replies + 2);
+-- end if;
comb_REPLY_POOL_DATAREADY <= '0';
case packet_counter is
end if;
when c_F2 =>
dhdr_addr <= "110";
- next_reply_adder_final_result <= std_logic_vector(unsigned(reply_adder_result) + number_of_replies);
+-- if enable_packing = '0' then
+ next_reply_adder_final_result <= std_logic_vector(unsigned(reply_adder_result) + number_of_replies);
+-- else
+-- next_reply_adder_final_result <= std_logic_vector(unsigned(reply_adder_result));
+-- end if;
if last_reply_adder_ready = '1' then
comb_REPLY_POOL_DATA <= reply_adder_final_result;
comb_REPLY_POOL_DATAREADY <= REPLY_POOL_next_read;
COMPILE_TIME : std_logic_vector(31 downto 0) := x"00000000";
COMPILE_VERSION : std_logic_vector(15 downto 0) := x"0001";
HARDWARE_VERSION : std_logic_vector(31 downto 0) := x"12345678";
+ INIT_ENDPOINT_ID : std_logic_vector(15 downto 0) := x"0001";
CLOCK_FREQUENCY : integer range 1 to 200 := 100;
USE_ONEWIRE : integer range 0 to 2 := c_YES;
--media interfaces
MII_IBUF_DEPTH => MII_IBUF_DEPTH,
MII_IS_UPLINK => MII_IS_UPLINK,
MII_IS_DOWNLINK => MII_IS_DOWNLINK,
+ INIT_ENDPOINT_ID => INIT_ENDPOINT_ID,
INT_NUMBER => 3,
INT_CHANNELS => (0=>0,1=>1,2=>3,others=>0)
)