\subsubsection{Known bugs}
\begin{itemize*}
\item The serial interface to ADC 1 is not usable - CSB and PDWN are input-only on the FPGA
+ \item SDIO is missing a pull-down. This way the device runs in low-power mode on the digitial outputs.
\item LVDS\_INP\_2 is the only LVDS port that is terminated by an external resistor. Do not switch on corresponding LVDS termiantion in FPGA
\end{itemize*}
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