]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
added optional selection of bit width to spi interface
authorJan Michel <j.michel@gsi.de>
Wed, 30 Jul 2014 16:52:56 +0000 (18:52 +0200)
committerJan Michel <j.michel@gsi.de>
Wed, 30 Jul 2014 16:52:56 +0000 (18:52 +0200)
special/spi_ltc2600.vhd

index 07bc64f947b3df5bf6cc894b957e48636daada1b..73a6d95fef9875069812bce1a674a38afe78f200 100644 (file)
@@ -55,6 +55,7 @@ architecture spi_ltc2600_arch of spi_ltc2600 is
 
   type   fsm_t is (IDLE, WAIT_STATE, SET, TOGGLE_CS, TOGGLE_CS_0, TOGGLE_CS_1, TOGGLE_CS_2, FINISH);
   signal fsm_state : fsm_t;
+  signal word_length : integer range 0 to BITS := BITS;
   
 begin
 
@@ -73,15 +74,17 @@ begin
         BUS_ACK_OUT <= '1';
         if BUS_ADDR_IN(4) = '0' then     --0x00..0x0F
           ram(addr) <= BUS_DATA_IN;
-        elsif BUS_ADDR_IN(2) = '1' then  --0x14
+        elsif BUS_ADDR_IN(3 downto 0) = x"4" then  --0x14
           clear_reg <= BUS_DATA_IN(15 downto 0);
-        elsif BUS_ADDR_IN(3) = '1' then  --0x18
+        elsif BUS_ADDR_IN(3 downto 0) = x"8" then  --0x18
           invert_reg <= BUS_DATA_IN(0);
-        elsif BUS_ADDR_IN(0) = '1' then  --0x11
+        elsif BUS_ADDR_IN(3 downto 0) = x"9" then  -- 0x19
+          word_length <= to_integer(unsigned(BUS_DATA_IN(5 downto 0)));
+        elsif BUS_ADDR_IN(3 downto 0) = x"1" then  --0x11
           ctrl_reg <= BUS_DATA_IN;
           blocked  <= BUS_DATA_IN(16);
           start    <= not sudolock or BUS_DATA_IN(17) ;
-        else                             --0x10
+        elsif BUS_ADDR_IN(3 downto 0) = x"0" then  --0x10
           chipselect_reg <= BUS_DATA_IN(15 downto 0);
         end if;
       elsif BUS_ADDR_IN = "10011" then   --Reg. 0x13
@@ -95,23 +98,26 @@ begin
     if BUS_READ_IN = '1' then
       if BUS_ADDR_IN(4) = '0' then
         BUS_DATA_OUT <= ram(addr);
-      elsif BUS_ADDR_IN(0) = '1' then
-        BUS_DATA_OUT <= ctrl_reg;
-      elsif BUS_ADDR_IN(2) = '1' then
-        BUS_DATA_OUT(15 downto 0)  <= clear_reg;
+      elsif BUS_ADDR_IN(3 downto 0) = x"0" then
+        BUS_DATA_OUT(15 downto 0)  <= chipselect_reg;
         BUS_DATA_OUT(31 downto 16) <= x"0000";
-      elsif BUS_ADDR_IN(3) = '1' then
-        BUS_DATA_OUT(0)           <= invert_reg;
-        BUS_DATA_OUT(31 downto 1) <= (others => '0');
-      elsif BUS_ADDR_IN(1) = '1' then
+      elsif BUS_ADDR_IN(3 downto 0) = x"1" then
+        BUS_DATA_OUT <= ctrl_reg;
+      elsif BUS_ADDR_IN(3 downto 0) = x"2" then
         BUS_DATA_OUT <= readback;
         blocked      <= '0';
-      elsif BUS_ADDR_IN(4 downto 0) = "10011" then
+      elsif BUS_ADDR_IN(3 downto 0) = x"3" then
         BUS_DATA_OUT     <= (others => '0');
         BUS_DATA_OUT(17) <= sudolock;
-      else                              --if BUS_ADDR_IN(1) = '0' then
-        BUS_DATA_OUT(15 downto 0)  <= chipselect_reg;
+      elsif BUS_ADDR_IN(3 downto 0) = x"4" then
+        BUS_DATA_OUT(15 downto 0)  <= clear_reg;
         BUS_DATA_OUT(31 downto 16) <= x"0000";
+      elsif BUS_ADDR_IN(3 downto 0) = x"8" then
+        BUS_DATA_OUT(0)           <= invert_reg;
+        BUS_DATA_OUT(31 downto 1) <= (others => '0');
+      elsif BUS_ADDR_IN(3 downto 0) = x"9" then
+        BUS_DATA_OUT             <= (others => '0');
+        BUS_DATA_OUT(5 downto 0) <= std_logic_vector(to_unsigned(word_length,6));
       end if;
       BUS_ACK_OUT <= '1';
     end if;
@@ -132,7 +138,7 @@ begin
         if start = '1' then
           ram_addr   <= 0;
           word_count <= to_integer(unsigned(ctrl_reg(4 downto 0)));
-          bit_count  <= BITS-1;
+          bit_count  <= word_length-1;
           time_count <= WAITCYCLES;
           fsm_state  <= WAIT_STATE;
           spi_cs     <= not chipselect_reg;
@@ -159,7 +165,7 @@ begin
             fsm_state <= WAIT_STATE;
           else
             ram_addr  <= ram_addr + 1;
-            bit_count <= BITS-1;
+            bit_count <= word_length-1;
             if ram_addr /= word_count -1 then
               if ctrl_reg(7) = '0' then  --one CS phase
                 fsm_state <= WAIT_STATE;
@@ -195,7 +201,7 @@ begin
         time_count <= time_count - 1;
         if time_count = 0 then
           spi_cs     <= not chipselect_reg;
-          bit_count  <= BITS-1;
+          bit_count  <= word_length-1;
           fsm_state  <= WAIT_STATE;
           time_count <= WAITCYCLES;
         end if;