Setting default PORT_MASK_ENABLE as in actual declaration of trb_net16_regio_bus_handler

diff --git a/trb_net_components.vhd b/trb_net_components.vhd
index b9089c91d160c8c1bbf73ce29c9e6b87620c234d..595d575b625185dace9176443e73e441915914ab 100644 (file)
--- a/trb_net_components.vhd
+++ b/trb_net_components.vhd
@@ -2652,7 +2652,7 @@ end component;
       PORT_NUMBER    : integer range 1 to c_BUS_HANDLER_MAX_PORTS := 3;\r
       PORT_ADDRESSES : c_BUS_HANDLER_ADDR_t                       := (others => (others => '0'));\r
       PORT_ADDR_MASK : c_BUS_HANDLER_WIDTH_t                      := (others => 0);\r
-      PORT_MASK_ENABLE : integer range 0 to 1\r
+      PORT_MASK_ENABLE : integer range 0 to 1                     := 0\r
       );\r
     port(\r
       CLK                  : in  std_logic;\r