]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/commitdiff
fixing bug in serdes monitoring and removing dummy reset of mupix time stamps.
authorTobias Weber <toweber86@gmail.com>
Wed, 15 Aug 2018 08:22:35 +0000 (10:22 +0200)
committerTobias Weber <toweber86@gmail.com>
Wed, 15 Aug 2018 08:22:35 +0000 (10:22 +0200)
mupix/Mupix8/sources/Datapath/MuPixDataLink_new.vhd
mupix/Mupix8/sources/Datapath/MupixTRBReadout.vhd
mupix/Mupix8/sources/Simulation/DataOutput.vhd [moved from mupix/Mupix8/sources/Simulation/DataOutput1X.vhd with 100% similarity]
mupix/Mupix8/trb3_periph.vhd

index 887442bcf098d805a88e1c96f2b8888b57b094b4..e0934855d4b3a51c69f03d2b7e82c4d807a5ca82 100644 (file)
@@ -632,8 +632,8 @@ begin
               slv_ack_out  <= '1';
               slv_data_out <= komma_counter(serdes_channel_select);
             when x"0169" =>
-              slv_ack_out  <= '1';
-              slv_data_out <= fifo_readcnt_i((serdes_channel_select + 1)*fifo_depth - 1 downto serdes_channel_select*fifo_depth);
+              slv_ack_out                           <= '1';
+              slv_data_out(fifo_depth - 1 downto 0) <= fifo_readcnt_i((serdes_channel_select + 1)*fifo_depth - 1 downto serdes_channel_select*fifo_depth);
             when x"016a" =>
               slv_ack_out              <= '1';
               slv_data_out(4 downto 0) <= rx_disp_err_sync(serdes_channel_select)
index 433db96441ebd21a9062df5402b5b3cbf59620fc..d0bf9be805ef40f4d332bc324f6a2d63e5b6b6ce 100644 (file)
@@ -344,6 +344,7 @@ begin
         SLV_DATA_IN_i        <= (others => '0');
         SLV_READ_IN_i        <= '0';
         SLV_WRITE_IN_i       <= '0';
+        multiplexer_mask     <= (others => '0');
       else
         SLV_DATA_OUT         <= (others => '0');
         SLV_ACK_OUT          <= '0';
index 288e59e22cc6adb2b6e116555f4b64c25c32e71d..caaa7debd2d45c2d2cfbb89ca0e5b19b338d960d 100644 (file)
@@ -853,19 +853,4 @@ begin
         clkdata_o   => mupix_clk_i);
   end generate gen_simulation;
 
-  --dummy process to test syncres
-  dummy_proc : process(clk_100_i)
-  begin
-    if rising_edge(clk_100_i) then
-      if dummy_counter = 7 then
-        syncres_i     <= not syncres_i;
-        dummy_counter <= 0;
-      else
-        dummy_counter <= dummy_counter + 1;
-      end if;
-    end if;
-  end process dummy_proc;
-
-  syncres <= syncres_i;
-
 end architecture;