*** empty log message ***

diff --git a/design/fifo_8192depth_36width_dual_thresh_reg_out.lpc b/design/fifo_8192depth_36width_dual_thresh_reg_out.lpc
new file mode 100644 (file)
index 0000000..c4bd4eb
--- /dev/null
+++ b/design/fifo_8192depth_36width_dual_thresh_reg_out.lpc
@@ -0,0 +1,44 @@
+[Device]
+Family=latticeecp2m
+PartType=LFE2M20E
+PartName=LFE2M20E-5F256C
+SpeedGrade=-5
+Package=FPBGA256
+OperatingCondition=COM
+Status=P
+
+[IP]
+VendorName=Lattice Semiconductor Corporation
+CoreType=LPM
+CoreStatus=Demo
+CoreName=FIFO
+CoreRevision=4.6
+ModuleName=fifo_8192depth_36width_dual_thresh_reg_out
+SourceFormat=Schematic/VHDL
+ParameterFileVersion=1.0
+Date=07/22/2009
+Time=17:09:38
+
+[Parameters]
+Verilog=0
+VHDL=1
+EDIF=1
+Destination=Synplicity
+Expression=BusA(0 to 7)
+Order=Big Endian [MSB:LSB]
+IO=0
+FIFOImp=EBR Based
+Depth=8192
+Width=36
+regout=1
+CtrlByRdEn=0
+EmpFlg=1
+PeMode=Dynamic - Single Threshold
+PeAssert=10
+PeDeassert=12
+FullFlg=1
+PfMode=Dynamic - Single Threshold
+PfAssert=508
+PfDeassert=506
+RDataCount=1
+EnECC=0