]> jspc29.x-matter.uni-frankfurt.de Git - daqdocu.git/commitdiff
table beautifying - cu
authorhadaq <hadaq>
Tue, 24 Jul 2012 14:29:34 +0000 (14:29 +0000)
committerhadaq <hadaq>
Tue, 24 Jul 2012 14:29:34 +0000 (14:29 +0000)
trb3/TdcDataFormat.tex
trb3/TdcSlowControl.tex

index 1c57fb9e155cda5a09523995eeffb2c538ba2d19..f5b9382cf72809fc9ac0b96f1af03f7af40bb644 100644 (file)
@@ -63,12 +63,13 @@ The data format of the \textbf{\textit{time data}} word is shown below:
 \end{table}
 
 \begin{tabbing}
-  "1" \hspace{1.5cm}\= 1 bit \hspace{1.5cm}\= Time Data marker \\
-  reserved \> 3 bits \> Reserved for future use \\
-  channel no \> 6 bits \> 6 bits The channel number of the TDC \textendash\ “000000” is the reference channel \\
-  fine time \> 10 bits \> The fine time value of the measurement \\
-  edge \> 1 bit \> The type of the measurement – '1' for rising edge, '0' for falling edge \\
-  coarse time \> 11 bits \> The coarse time value of the measurement \textendash\ 5~ns granularity \\
+  "1" \hspace{1.5cm}\= 1 bit \hspace{0.8cm}\= Time Data marker\\
+  reserved     \> 3 bits       \> Reserved for future use\\
+  channel no   \> 6 bits       \> 6 bits The channel number of the TDC\\
+               \>              \>      “000000” is the reference channel\\
+  fine time    \> 10 bits      \> The fine time value of the measurement\\
+  edge                 \> 1 bit        \> The type of the measurement – '1' for rising edge, '0' for falling edge\\
+  coarse time  \> 11 bits      \> The coarse time value of the measurement – 5~ns granularity\\
 \end{tabbing}
 
 Any word starting with the bit "1" indicates a time data word from the TDC in the system.
@@ -109,21 +110,21 @@ The debug information sent is given in Table \ref{tab:tdcDebugWords}.
 
 \begin{table}[htbp]
   \begin{center}
-    \begin{tabularx}{\textwidth}{|c|r|L|}
+    \begin{tabularx}{\textwidth}{|c|rL|}
       \hline
-      Debug Mode       & Name                          & Explanation\\\hline\hline
-      "00000"          & Trigger number                & Number of valid triggers received\\
-      "00001"          & Release Number                & Number of release signals sent\\
-      "00010"          & Valid timing trigger number   & Number of valid timing triggers received\\
-      "00011"          & Valid NOtiming trigger number & Number of valid triggers received which are not timing triggers\\
-      "00100"          & Invalid trigger number        & Number of invalid triggers received\\
-      "00101"          & Multi timing trigger number   & Number of multi timing triggers (triggers received before trigger is released) received\\
-      "00110"          & Spurious trigger number       & Number of spurious triggers received (in case of timing trigger is validated although it was a timing-trigger-less trigger)\\
-      "00111"          & Wrong readout number          & Number of wrong readouts due to spurious triggers\\
-      "01000"          & Spike number                  & Number of spikes (pulses narrower than 40~ns) detected at the timing trigger input\\
-      "01001"          & Idle time                     & Total time length, that the readout FSM waited in the idle state (with granularity of 10~ns)\\
-      "01010"          & Wait time                     & Total time length, that the readout FSM waited in the wait states (with granularity of 10~ns)\\
-      "01011"          & Total empty channels          & Number of empty channels since the last reset signal\\
+      Debug Mode               & Name                                          & Explanation\\\hline\hline
+      "00000"                  & Trigger number                                & Number of valid triggers received\\\hline
+      "00001"                  & Release Number                                & Number of release signals sent\\\hline
+      "00010"                  & Valid timing trigger number                   & Number of valid timing triggers received\\\hline
+      \multirow{2}{*}{"00011"} & \multirow{2}{*}{Valid NOtiming trigger number}& Number of valid triggers received which are not timing triggers\\\hline
+      "00100"                  & Invalid trigger number                        & Number of invalid triggers received\\\hline
+      \multirow{3}{*}{"00101"} & \multirow{3}{*}{Multi timing trigger number}  & Number of multi timing triggers (triggers received before trigger is released) received\\\hline
+      \multirow{4}{*}{"00110"} & \multirow{4}{*}{Spurious trigger number}      & Number of spurious triggers received (in case of timing trigger is validated although it was a timing-trigger-less trigger)\\\hline
+      \multirow{2}{*}{"00111"} & \multirow{2}{*}{Wrong readout number}         & Number of wrong readouts due to spurious triggers\\\hline
+      \multirow{2}{*}{"01000"} & \multirow{2}{*}{Spike number}                 & Number of spikes (pulses narrower than 40~ns) detected at the timing trigger input\\\hline
+      \multirow{3}{*}{"01001"} & \multirow{3}{*}{Idle time}                    & Total time length, that the readout FSM waited in the idle state (with granularity of 10~ns)\\\hline
+      \multirow{3}{*}{"01010"} & \multirow{3}{*}{Wait time}                    & Total time length, that the readout FSM waited in the wait states (with granularity of 10~ns)\\\hline
+      \multirow{2}{*}{"01011"} & \multirow{2}{*}{Total empty channels}         & Number of empty channels since the last reset signal\\
       \hline
     \end{tabularx}
   \caption{Debug information word bitmap.}
index d3bccf23c48a13bb9730e67f9d6a2ae0541baaec..b8c5226def3853cd3f33e7f8089323960f7bca63 100644 (file)
@@ -6,13 +6,13 @@ A set of control registers are assigned in order to access the basic controls, e
       \hline
       Address  & \multicolumn{1}{c|}{Name}     & Bits  & \multicolumn{1}{c|}{Explanation}\\
       \hline \hline
-      \multirow{5}{*}{0xc0}    & \multirow{5}{*}{Basic controls}       & 3-0   & Enables different signals to the HPLA* output for debugging with logic analyser (For more details see Table \ref{tab:tdcControlRegBasicLA}).\\
+      \multirow{10}{*}{0xc0}   & \multirow{10}{*}{Basic controls}      & 3-0   & Enables different signals to the HPLA* output for debugging with logic analyser (For more details see Table \ref{tab:tdcControlRegBasicLA}).\\
                                &                                       & 4     & Enables the \textit{Debug Mode}. Different statistics and debug words are sent after every trigger (see \ref{sec:tdcDebug}).\\
                                &                                       & 11-5  & reserved.\\
                                &                                       & 12    & Used to select the trigger mode. 1 - with trigger mode; 0 - trigger-less mode (For more details see \ref{sec:tdcTrigWin}).\\
                                &                                       & 31-13 & reserved.\\
       \hline
-      \multirow{5}{*}{0xc1}    & \multirow{5}{*}{Trigger window}       & 10-0  & Defines the trigger window width before the trigger with granularity of 5~ns. Minimum value is x"000".\\
+      \multirow{8}{*}{0xc1}    & \multirow{8}{*}{Trigger window}       & 10-0  & Defines the trigger window width before the trigger with granularity of 5~ns. Minimum value is x"000".\\
                                &                                       & 15-11 & reserved.\\
                                &                                       & 26-16 & Defines the trigger window width after the trigger with granularity of 5~ns. \textbf{ATTENTION! Minimum value can be set is x"00f".}\\
                                &                                       & 30-27 & reserved.\\
@@ -121,7 +121,7 @@ A set of control registers are assigned in order to access the basic controls, e
                                &                                       & 31-8  & reserved\\ \hline
       0x81                     & Empty channels 1                      & 31-0  & Empty signals of the channels 32-1\\ \hline
       0x82                     & Empty channels 2                      & 31-0  & Empty signals of the channels 64-33\\ \hline
-      \multirow{4}{*}{0x83}    & \multirow{4}{3.5cm}{Trigger window controls}  & 10-0  & Trigger window width before the trigger with granularity of 5~ns\\
+      \multirow{6}{*}{0x83}    & \multirow{6}{3.5cm}{Trigger window controls}  & 10-0  & Trigger window width before the trigger with granularity of 5~ns\\
                                &                                       & 15-11 & reserved\\
                                &                                       & 26-16 & Trigger window width after the trigger with granularity of 5~ns\\
                                &                                       & 15-11 & reserved\\ \hline
@@ -129,17 +129,17 @@ A set of control registers are assigned in order to access the basic controls, e
                                &                                       & 31-24 & reserved\\ \hline
       \multirow{2}{*}{0x85}    & \multirow{2}{3.5cm}{Valid timing trigger number}      & 23-0  & Number of valid timing triggers received\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x86}    & \multirow{2}{3.5cm}{Valid NOtiming trigger number}    & 23-0  & Number of valid triggers received which are not timing triggers\\
+      \multirow{3}{*}{0x86}    & \multirow{3}{3.5cm}{Valid NOtiming trigger number}    & 23-0  & Number of valid triggers received which are not timing triggers\\
                                &                                       & 31-24 & reserved\\ \hline
       \multirow{2}{*}{0x87}    & \multirow{2}{3.5cm}{Invalid trigger number}   & 23-0  & Number of invalid triggers received\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x88}    & \multirow{2}{3.5cm}{Multi timing trigger number}      & 23-0  & Number of multi timing triggers (triggers received before trigger is released) received\\
+      \multirow{3}{*}{0x88}    & \multirow{3}{3.5cm}{Multi timing trigger number}      & 23-0  & Number of multi timing triggers (triggers received before trigger is released) received\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x89}    & \multirow{2}{3.5cm}{Spurious trigger number}  & 23-0  & Number of spurious triggers received (in case of timing trigger is validated although it was a timing-trigger-less trigger)\\
+      \multirow{4}{*}{0x89}    & \multirow{4}{3.5cm}{Spurious trigger number}  & 23-0  & Number of spurious triggers received (in case of timing trigger is validated although it was a timing-trigger-less trigger)\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x8a}    & \multirow{2}{3.5cm}{Wrong readout number}     & 23-0  & Number of wrong readouts due to spurious triggers\\
+      \multirow{3}{*}{0x8a}    & \multirow{3}{3.5cm}{Wrong readout number}     & 23-0  & Number of wrong readouts due to spurious triggers\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x8b}    & \multirow{2}{3.5cm}{Spike number}     & 23-0  & Number of spikes (pulses narrower than 40~ns) detected at the timing trigger input\\
+      \multirow{3}{*}{0x8b}    & \multirow{3}{3.5cm}{Spike number}     & 23-0  & Number of spikes (pulses narrower than 40~ns) detected at the timing trigger input\\
                                &                                       & 31-24 & reserved\\ \hline
     \end{tabularx}
   \caption{The status registers of the TDC.}
@@ -153,11 +153,11 @@ A set of control registers are assigned in order to access the basic controls, e
       \hline
       Address  & \multicolumn{1}{c|}{Name}     & Bits  & \multicolumn{1}{c|}{Explanation}\\
       \hline \hline
-      \multirow{2}{*}{0x8c}    & \multirow{2}{3.5cm}{Idle time}        & 23-0  & Total time length, that the readout FSM waited in the idle state (with granularity of 10~ns)\\
+      \multirow{3}{*}{0x8c}    & \multirow{3}{3.5cm}{Idle time}        & 23-0  & Total time length, that the readout FSM waited in the idle state (with granularity of 10~ns)\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x8d}    & \multirow{2}{3.5cm}{Wait time}        & 23-0  & Total time length, that the readout FSM waited in the wait states (with granularity of 10~ns)\\
+      \multirow{3}{*}{0x8d}    & \multirow{3}{3.5cm}{Wait time}        & 23-0  & Total time length, that the readout FSM waited in the wait states (with granularity of 10~ns)\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0x8e}    & \multirow{2}{3.5cm}{Total empty channels}     & 23-0  & Number of empty channels since the last reset signal\\
+      \multirow{3}{*}{0x8e}    & \multirow{3}{3.5cm}{Total empty channels}     & 23-0  & Number of empty channels since the last reset signal\\
                                &                                       & 31-24 & reserved\\ \hline
       \multirow{2}{*}{0x8f}    & \multirow{2}{3.5cm}{Release Number}   & 23-0  & Number of release signals sent\\
                                &                                       & 31-24 & reserved\\ \hline