trigger_logic: Extend multiplicity to 3 instances

diff --git a/base/code/input_to_trigger_logic_record.vhd b/base/code/input_to_trigger_logic_record.vhd
index 8ab3b2b31a564aca2ab36dda21ad957cb1d26cf5..52a0a7dd3f9ff9e1909e57e5b0f00a1960a9a327 100644 (file)
--- a/base/code/input_to_trigger_logic_record.vhd
+++ b/base/code/input_to_trigger_logic_record.vhd
@@ -48,14 +48,25 @@ signal got_any_edge : std_logic_vector(OUTPUTS-1 downto 0) := (others => '0');
 signal got_coincidence : std_logic;
 signal got_simplecoin  : std_logic;
 signal coin_enable  : std_logic  := '0';
-signal current_multiplicity0, current_multiplicity1 : unsigned(7 downto 0);
-signal current_multiplicity, set_multiplicity       : unsigned(7 downto 0);
 signal set_stretcher                                : unsigned(5 downto 0);
-signal multiplicity_trigger : std_logic := '0';
-signal multiplicity_enable  : std_logic_vector(register_bits downto 0);
-signal mult_gated           : std_logic_vector(INPUTS-1 downto 0);
 
-signal set_output_coin, set_output_mult, set_output_simplecoin : std_logic_vector(7 downto 0);
+type unsigned7_arr is array(0 to 2) of unsigned(7 downto 0);
+signal current_multiplicity0, current_multiplicity1 : unsigned7_arr;
+signal current_multiplicity, set_multiplicity       : unsigned7_arr;
+
+
+signal multiplicity_trigger : std_logic_vector(2 downto 0);
+
+type stdvecreg_arr is array(0 to 2) of std_logic_vector(register_bits downto 0);
+signal multiplicity_enable  : stdvecreg_arr;
+
+type stdvecinp_arr is array(0 to 2) of std_logic_vector(INPUTS-1 downto 0);
+signal mult_gated           : stdvecinp_arr;
+
+type stdvec7_arr is array(0 to 2) of std_logic_vector(7 downto 0);
+signal set_output_mult      : stdvec7_arr;
+
+signal set_output_coin, set_output_simplecoin : std_logic_vector(7 downto 0);
 signal edge_enable  : std_logic_vector(7 downto 0) := (others => '0');
 
 type coincidence_arr is array(0 to 16) of integer range 0 to 63;
@@ -113,18 +124,33 @@ begin
       coincidence_config_2(to_integer(unsigned(BUS_RX.addr(3 downto 0)))) <= to_integer(unsigned(BUS_RX.data(5 downto 0)));
       coincidence_enable(to_integer(unsigned(BUS_RX.addr(3 downto 0))))   <= BUS_RX.data(31);
     elsif BUS_RX.addr(6 downto 0) = "0110010" then
-      set_multiplicity <= unsigned(BUS_RX.data(23 downto 16));
+      set_multiplicity(0) <= unsigned(BUS_RX.data(23 downto 16));
+      set_multiplicity(1) <= unsigned(BUS_RX.data(15 downto 8));
+      set_multiplicity(2) <= unsigned(BUS_RX.data(31 downto 24));
     elsif BUS_RX.addr(6 downto 0) = "0110011" then
-      multiplicity_enable(31 downto 0) <= BUS_RX.data;
+      multiplicity_enable(0)(31 downto 0) <= BUS_RX.data;
     elsif BUS_RX.addr(6 downto 0) = "0110100" then
       set_output_simplecoin <= BUS_RX.data(7 downto 0);
-      set_output_mult <= BUS_RX.data(15 downto 8);
+      set_output_mult(0) <= BUS_RX.data(15 downto 8);
       set_output_coin <= BUS_RX.data(23 downto 16);
       edge_enable     <= BUS_RX.data(31 downto 24);
     elsif BUS_RX.addr(6 downto 0) = "0110101" and INPUTS > 32 then
-      multiplicity_enable(63 downto 32) <= BUS_RX.data;
+      multiplicity_enable(0)(63 downto 32) <= BUS_RX.data;
     elsif BUS_RX.addr(6 downto 0) = "0110110" then
       set_stretcher <= unsigned(BUS_RX.data(5 downto 0));
+    elsif BUS_RX.addr(6 downto 0) = "0110111" then
+      set_output_mult(1) <= BUS_RX.data(7 downto 0);
+      set_output_mult(2) <= BUS_RX.data(15 downto 8);
+      
+    elsif BUS_RX.addr(6 downto 0) = "0111000" then
+      multiplicity_enable(1)(31 downto 0) <= BUS_RX.data;
+    elsif BUS_RX.addr(6 downto 0) = "0111001" and INPUTS > 32 then
+      multiplicity_enable(1)(63 downto 32) <= BUS_RX.data;
+    elsif BUS_RX.addr(6 downto 0) = "0111010" then
+      multiplicity_enable(2)(31 downto 0) <= BUS_RX.data;
+    elsif BUS_RX.addr(6 downto 0) = "0111011" and INPUTS > 32 then
+      multiplicity_enable(2)(63 downto 32) <= BUS_RX.data;
+      
     else
       BUS_TX.nack <= '1'; 
       BUS_TX.ack  <= '0';
@@ -183,15 +209,26 @@ begin
       BUS_TX.data( 6 downto  0)   <= std_logic_vector(to_unsigned(INPUTS,7));
       BUS_TX.data(11 downto  8)   <= std_logic_vector(to_unsigned(OUTPUTS,4));      
     elsif BUS_RX.addr(6 downto 0) = "0110010" then
-      BUS_TX.data                 <= x"00" & std_logic_vector(set_multiplicity) & x"00" & std_logic_vector(current_multiplicity);
+      BUS_TX.data                 <= std_logic_vector(set_multiplicity(2)) & std_logic_vector(set_multiplicity(0)) 
+                                   & std_logic_vector(set_multiplicity(1)) & std_logic_vector(current_multiplicity(0));
     elsif BUS_RX.addr(6 downto 0) = "0110011" then
-      BUS_TX.data                 <= multiplicity_enable(31 downto 0);
+      BUS_TX.data                 <= multiplicity_enable(0)(31 downto 0);
     elsif BUS_RX.addr(6 downto 0) = "0110100" then
-      BUS_TX.data <= edge_enable & set_output_coin & set_output_mult & set_output_simplecoin;
+      BUS_TX.data <= edge_enable & set_output_coin & set_output_mult(0) & set_output_simplecoin;
     elsif BUS_RX.addr(6 downto 0) = "0110101" and INPUTS > 32 then
-      BUS_TX.data                 <= multiplicity_enable(63 downto 32);
+      BUS_TX.data                 <= multiplicity_enable(1)(63 downto 32);
     elsif BUS_RX.addr(6 downto 0) = "0110110" then
       BUS_TX.data                 <= x"000000" & "00" & std_logic_vector(set_stretcher);
+    elsif BUS_RX.addr(6 downto 0) = "0110111" then
+      BUS_TX.data <= x"0000" & set_output_mult(2) & set_output_mult(1);
+    elsif BUS_RX.addr(6 downto 0) = "0111000" then
+      BUS_TX.data                 <= multiplicity_enable(1)(31 downto 0);
+    elsif BUS_RX.addr(6 downto 0) = "0111001" and INPUTS > 32 then
+      BUS_TX.data                 <= multiplicity_enable(1)(63 downto 32);
+    elsif BUS_RX.addr(6 downto 0) = "0111010" then
+      BUS_TX.data                 <= multiplicity_enable(2)(31 downto 0);
+    elsif BUS_RX.addr(6 downto 0) = "0111011" and INPUTS > 32 then
+      BUS_TX.data                 <= multiplicity_enable(2)(63 downto 32);      
     else  
       BUS_TX.nack <= '1'; 
       BUS_TX.ack  <= '0';
@@ -249,7 +286,9 @@ gen_outs : for i in 0 to OUTPUTS-1 generate
                   or (or_all(inp_inv(INPUTS-1 downto 0) and not stretch_inp(INPUTS-1 downto 0) and enable(i)(INPUTS-1 downto 0)) and not edge_enable(i))
                   or (got_any_edge(i) and edge_enable(i))
                   or (got_simplecoin and set_output_simplecoin(i))
-                  or (multiplicity_trigger and set_output_mult(i))
+                  or (multiplicity_trigger(0) and set_output_mult(0)(i))
+                  or (multiplicity_trigger(1) and set_output_mult(1)(i))
+                  or (multiplicity_trigger(2) and set_output_mult(2)(i))
                   or (got_coincidence and set_output_coin(i))                   
                   ;
 got_any_edge(i) <= or_all(inp_edge(INPUTS-1 downto 0) and enable(i)(INPUTS-1 downto 0)) when rising_edge(CLK);
@@ -275,8 +314,7 @@ got_simplecoin    <= coin_in_1 and coin_in_2 and coin_enable when rising_edge(CL
 ----------------------------
 --  Multiplicity Trigger
 ----------------------------
-
--- gen_mult : if OUTPUTS >= 2 generate
+gen_mult : for a in 0 to 2 generate
   PROC_MULT : process 
     variable m : integer range 0 to 32;
     variable numchan : integer range 0 to 63;
@@ -284,38 +322,35 @@ got_simplecoin    <= coin_in_1 and coin_in_2 and coin_enable when rising_edge(CL
     wait until rising_edge(CLK);
     numchan := minimum(INPUTS-1,31);
     
-    mult_gated(INPUTS-1 downto 0) <= inp_verylong(INPUTS-1 downto 0) and multiplicity_enable(INPUTS-1 downto 0);
+    mult_gated(a)(INPUTS-1 downto 0) <= inp_verylong(INPUTS-1 downto 0) and multiplicity_enable(a)(INPUTS-1 downto 0);
     
     m := 0;
     for i in 0 to numchan loop  --was INPUTS-1 @ 09.17
-      if mult_gated(i) = '1' then
+      if mult_gated(a)(i) = '1' then
         m := m + 1;
       end if;  
     end loop;
-    current_multiplicity0 <= to_unsigned(m,8);
+    current_multiplicity0(a) <= to_unsigned(m,8);
 
     if(INPUTS >= 32) then
       m := 0;
       numchan := minimum(INPUTS-1,63);
       for i in 32 to numchan loop  --was INPUTS-1 @ 09.17
-        if mult_gated(i) = '1' then
+        if mult_gated(a)(i) = '1' then
           m := m + 1;
         end if;  
       end loop;
-      current_multiplicity1 <= to_unsigned(m,8);    
+      current_multiplicity1(a) <= to_unsigned(m,8);    
     end if;  
     
-    if current_multiplicity0 + current_multiplicity1 >= set_multiplicity and set_multiplicity > 0 then
-      multiplicity_trigger <= '1';
+    if current_multiplicity0(a) + current_multiplicity1(a) >= set_multiplicity(a) and set_multiplicity(a) > 0 then
+      multiplicity_trigger(a) <= '1';
     else
-      multiplicity_trigger <= '0';
+      multiplicity_trigger(a) <= '0';
     end if;
-    current_multiplicity <= current_multiplicity0 + current_multiplicity1;
+    current_multiplicity(a) <= current_multiplicity0(a) + current_multiplicity1(a);
   end process;
--- end generate;  
--- gen_no_mult : if OUTPUTS < 2 generate 
---   multiplicity_trigger <= '0';
--- end generate;
+end generate;
 
 
 ----------------------------