<description>Reference time synchronised to 100 MHz Trb-Net
clock</description>
</field>
+ <field name="TdcVersion" start="17" bits="11" invertflag="true" format="hex">
+ <description>TDC core version number</description>
+ </field>
<field name="TriggerType" start="28" bits="4" format="hex" purpose="status">
<description>Trigger type</description>
</field>
</register>
- <memory name="EmptyChannels" address="0001" size="2" mode="w" purpose="trigger">
- <description>Empty the signals/hits of the specific channel. LSB
- is channel 1.</description>
- <field name="EmptyChannels" start="0" bits="64" format="bitmask" />
- </memory>
+<!-- <memory name="EmptyChannels" address="0001" size="2" mode="w" purpose="trigger"> -->
+<!-- <description>Empty the signals/hits of the specific channel. LSB -->
+<!-- is channel 1.</description> -->
+<!-- <field name="EmptyChannels" start="0" bits="64" format="bitmask" /> -->
+<!-- </memory> -->
<register name="TriggerWindowStatus" address="0003" purpose="status">
<description>Status of the TriggerWindow feature</description>
<enumItem value="0">TRIGGERED</enumItem>
<enumItem value="1">TRIGGERLESS</enumItem>
</field>
+ <field name="ResetCoarseCounter" start="13" bits="1" mode="rw" format="boolean">
+ <description>Used to reset the coarse counters. Setting this bit signals for the coarse counter reset but the action will take place with the arrival of the next valid trigger in order to synchronise the coarse counters in a large system.</description>
+ </field>
+ <field name="CalibrationPrescaler" start="28" bits="4" mode="rw" format="unsigned">
+ <description>Used to divide the calibration hit frequency.</description>
+ </field>
</register>
<register name="TriggerWindowConfig" address="0001">