Base: create_project: allow whitespace in prj statements at end of line...

diff --git a/base/create_project.pl b/base/create_project.pl
index 9a20899a9768f16e42078f008caa84856b528070..93fed0af8feeebb3994025645bc257692a5e996a 100755 (executable)
--- a/base/create_project.pl
+++ b/base/create_project.pl
@@ -20,11 +20,11 @@ sub parsePRJ {
    open FH, "<" , $input;
    while (my $line = <FH>) {
       chomp $line;
-      if ($line =~ m/^\s*set_option -([^\s]+)\s+"?([^"]+)"?$/) {
+      if ($line =~ m/^\s*set_option -([^\s]+)\s+"?([^"]+)"?\s*$/) {
          $options->{$1} = $2;
       }
       
-      if ($line =~ m/^\s*add_file -(vhdl|verilog|fpga_constraint)( -lib "?([^"\s]+)"?|)? "?([^"]+)"?$/g) {
+      if ($line =~ m/^\s*add_file -(vhdl|verilog|fpga_constraint)( -lib "?([^"\s]+)"?|)? "?([^"]+)"?\s*$/g) {
          push @files, [$3, $4];
       }