GbE AN hopefully fied now

diff --git a/gbe_trb/base/gbe_lsm.vhd b/gbe_trb/base/gbe_lsm.vhd
index 81ab5d50c7084b4d9503f82b4a4afb03cadc13e2..b91c0a8160a81544745c4b4bd22b42c392bd721f 100644 (file)
--- a/gbe_trb/base/gbe_lsm.vhd
+++ b/gbe_trb/base/gbe_lsm.vhd
@@ -9,10 +9,12 @@ entity gbe_lsm is
     CLK                  : in  std_logic;\r
     RESET                : in  std_logic;\r
     -- \r
-    MAC_AN_COMPLETE_IN   : in  std_logic; -- PCS Autonegotiation completed\r
+    SERDES_ACTIVE_IN     : in  std_logic; -- SerDes Tx / Rx channels operational\r
+    AN_COMPLETE_IN       : in  std_logic; -- Link AN completed\r
     MAC_READY_CONF_IN    : in  std_logic; -- MAC configuration completed\r
-    MAC_RECONF_OUT       : out std_logic; -- start MAC configuration\r
     --\r
+    AN_RESTART_OUT       : out std_logic;\r
+    MAC_RECONF_OUT       : out std_logic;\r
     LINK_ACTIVE_OUT      : out std_logic;\r
     --\r
     DEBUG                : out std_logic_vector(15 downto 0)\r
@@ -24,36 +26,35 @@ architecture gbe_lsm_arch of gbe_lsm is
 -- Components\r
 \r
 -- state machine signals\r
-  type state_t is (INACTIVE,WAIT_PCS,ENABLE_MAC,DELAY,ACTIVATED);\r
+  type state_t is (INACTIVE,AN_WAIT,AN_RESTART,ENABLE_MAC,ACTIVATED);\r
   signal STATE, NEXT_STATE    : state_t;\r
 \r
 -- Signals\r
-  signal dly_ctr       : unsigned(15 downto 0);\r
-  signal ce_dly_ctr    : std_logic;\r
-  signal rst_dly_ctr   : std_logic;\r
-  signal dly_ctr_done  : std_logic;\r
-  signal reconf_mac    : std_logic;\r
+  signal dly_ctr         : unsigned(24 downto 0);\r
+  signal dly_ctr_done    : std_logic;\r
+  signal dly_ctr_rst_x   : std_logic;\r
+  signal dly_ctr_rst     : std_logic;\r
+  signal reconf_mac_x    : std_logic;\r
+  signal reconf_mac      : std_logic;\r
+  signal restart_an_x    : std_logic;\r
+  signal restart_an      : std_logic;\r
 \r
 begin\r
-\r
-  MAC_RECONF_OUT <= reconf_mac;\r
-\r
-  LINK_ACTIVE_OUT <= '1' when (STATE = ACTIVATED) else '0';\r
-  \r
-  THE_DLY_CTR: process( CLK )\r
+ \r
+  THE_DLY_CTR: process( CLK, RESET )\r
   begin\r
     if   ( RESET = '1' ) then\r
       dly_ctr <= (others => '0');\r
     elsif( rising_edge(CLK) ) then\r
-      if( rst_dly_ctr = '1' ) then\r
+      if( (dly_ctr_done = '1') or (dly_ctr_rst = '1') ) then\r
         dly_ctr <= (others => '0');\r
-      elsif( ce_dly_ctr = '1' ) then\r
+      else\r
         dly_ctr <= dly_ctr + 1;\r
       end if;\r
     end if;\r
   end process THE_DLY_CTR;\r
   \r
-  dly_ctr_done <= '1' when dly_ctr = x"ffff" else '0';\r
+  dly_ctr_done <= dly_ctr(dly_ctr'left);\r
 \r
   -----------------------------------------------------------\r
   -- statemachine: clocked process\r
@@ -62,67 +63,77 @@ begin
   begin\r
     if   ( RESET = '1' ) then\r
       STATE <= INACTIVE;\r
+      restart_an <= '0';\r
+      reconf_mac <= '0';\r
+      dly_ctr_rst <= '1';\r
     elsif( rising_edge(CLK) ) then\r
       STATE <= NEXT_STATE;\r
+      restart_an <= restart_an_x;\r
+      reconf_mac <= reconf_mac_x;\r
+      dly_ctr_rst <= dly_ctr_rst_x;\r
     end if;\r
   end process THE_FSM;\r
 \r
-  THE_STATE_TRANSITIONS: process( STATE, MAC_AN_COMPLETE_IN, MAC_READY_CONF_IN, dly_ctr_done )\r
+  THE_STATE_TRANSITIONS: process( STATE, SERDES_ACTIVE_IN, AN_COMPLETE_IN, MAC_READY_CONF_IN, dly_ctr_done )\r
   begin\r
-    reconf_mac <= '0';\r
-    ce_dly_ctr <= '0';\r
-    rst_dly_ctr <= '0';\r
+    restart_an_x <= '0';\r
+    reconf_mac_x <= '0';\r
+    dly_ctr_rst_x <= '1';\r
     \r
     case STATE is\r
 \r
       when INACTIVE =>\r
-        rst_dly_ctr <= '1';\r
-        if( MAC_AN_COMPLETE_IN = '1' ) then\r
-          NEXT_STATE <= WAIT_PCS;\r
+        if( SERDES_ACTIVE_IN = '1' ) then\r
+          -- wait for SerDes Tx/Rx to be active\r
+          NEXT_STATE <= AN_RESTART;\r
+          restart_an_x <= '1';\r
         else\r
           NEXT_STATE <= INACTIVE;\r
         end if;\r
 \r
-      when WAIT_PCS =>\r
-        ce_dly_ctr <= '1';\r
-        if( MAC_AN_COMPLETE_IN = '0' ) then\r
+      when AN_RESTART =>\r
+        if   ( SERDES_ACTIVE_IN = '0' ) then\r
+          -- SerDes broken\r
           NEXT_STATE <= INACTIVE;\r
         else\r
-          if( dly_ctr_done = '1' ) then \r
-            NEXT_STATE <= ENABLE_MAC;\r
-            reconf_mac <= '1';\r
-          else\r
-            NEXT_STATE <= WAIT_PCS;\r
-          end if;\r
+          NEXT_STATE <= AN_WAIT;\r
         end if;\r
 \r
-      when ENABLE_MAC =>\r
-        rst_dly_ctr <= '1';\r
-        if( MAC_AN_COMPLETE_IN = '0' ) then\r
+      when AN_WAIT =>\r
+        if   ( SERDES_ACTIVE_IN = '0' ) then\r
+          -- SerDes broken\r
           NEXT_STATE <= INACTIVE;\r
         else\r
-          if( MAC_READY_CONF_IN = '1' ) then\r
-            NEXT_STATE <= DELAY;\r
-          else \r
+          dly_ctr_rst_x <= '0';\r
+          if( AN_COMPLETE_IN = '1' ) then\r
+            -- AN completed\r
             NEXT_STATE <= ENABLE_MAC;\r
+            reconf_mac_x <= '1';\r
+          elsif( dly_ctr_done = '1' ) then\r
+            -- no AN within delay\r
+            NEXT_STATE <= AN_RESTART;\r
+            restart_an_x <= '1';\r
+          else\r
+            NEXT_STATE <= AN_WAIT;\r
           end if;\r
         end if;\r
 \r
-      when DELAY =>\r
-        ce_dly_ctr <= '1';\r
-        if( MAC_AN_COMPLETE_IN = '0' ) then\r
+      when ENABLE_MAC =>\r
+        if   ( SERDES_ACTIVE_IN = '0' ) then\r
+          -- SerDes broken\r
           NEXT_STATE <= INACTIVE;\r
         else\r
-          if( dly_ctr_done = '1' ) then\r
+          if( MAC_READY_CONF_IN = '1' ) then\r
             NEXT_STATE <= ACTIVATED;\r
           else \r
-            NEXT_STATE <= DELAY;\r
+            NEXT_STATE <= ENABLE_MAC;\r
+            reconf_mac_x <= '1';\r
           end if;\r
         end if;\r
-        \r
+\r
       when ACTIVATED =>\r
-        rst_dly_ctr <= '1';\r
-        if( MAC_AN_COMPLETE_IN = '0' ) then\r
+        if   ( SERDES_ACTIVE_IN = '0' ) then\r
+          -- SerDes broken\r
           NEXT_STATE <= INACTIVE;\r
         else\r
           NEXT_STATE <= ACTIVATED;\r
@@ -133,4 +144,8 @@ begin
     end case;\r
   end process THE_STATE_TRANSITIONS;\r
 \r
+  AN_RESTART_OUT  <= restart_an;\r
+  MAC_RECONF_OUT  <= reconf_mac;\r
+  LINK_ACTIVE_OUT <= '1' when (STATE = ACTIVATED) else '0';\r
+\r
 end architecture;\r

diff --git a/gbe_trb_ecp3/media/gbe_med_fifo.vhd b/gbe_trb_ecp3/media/gbe_med_fifo.vhd
index 2b78765576158989bbe56bdbbdea2f032c22b17d..1d28e09b23ef5e4c4dcb96ff0e3331a16baa54d1 100644 (file)
--- a/gbe_trb_ecp3/media/gbe_med_fifo.vhd
+++ b/gbe_trb_ecp3/media/gbe_med_fifo.vhd
@@ -294,8 +294,9 @@ architecture gbe_med_fifo_arch of gbe_med_fifo is
   signal main_rx_state                            : std_logic_vector(15 downto 0);
   
   signal mr_page_rx_i                             : std_logic_vector(3 downto 0);
---  signal rst_n_sgmii_i                            : std_logic_vector(3 downto 0);
-  
+  signal an_restart_i                             : std_logic_vector(3 downto 0);
+  signal mr_an_complete_i                         : std_logic_vector(3 downto 0);
+
 begin
 
 -- constants used as reminder
@@ -576,10 +577,10 @@ begin
       DEBUG_OUT((i + 1) * 32 - 13) <= '0';
       DEBUG_OUT((i + 1) * 32 - 14) <= '0';
       DEBUG_OUT((i + 1) * 32 - 15) <= '0';
-      DEBUG_OUT((i + 1) * 32 - 16) <= '0';
-      DEBUG_OUT((i + 1) * 32 - 17) <= '0'; -- (15)
-      DEBUG_OUT((i + 1) * 32 - 18) <= '0'; -- (14)
-      DEBUG_OUT((i + 1) * 32 - 19) <= '0'; -- (13)
+      DEBUG_OUT((i + 1) * 32 - 16) <= mr_an_complete_i(i); -- (16)
+      DEBUG_OUT((i + 1) * 32 - 17) <= mac_ready_conf(i); -- (15)
+      DEBUG_OUT((i + 1) * 32 - 18) <= mac_reconf(i); -- (14)
+      DEBUG_OUT((i + 1) * 32 - 19) <= an_restart_i(i); -- (13)
       DEBUG_OUT((i + 1) * 32 - 20) <= an_link_ok_i(i); -- (12)
       DEBUG_OUT((i + 1) * 32 - 21) <= mr_page_rx_i(i); -- (11)
       DEBUG_OUT((i + 1) * 32 - 22) <= cfg_rx_int(i); -- (10)
@@ -682,19 +683,12 @@ begin
         sd_rx_data_dst(i * 8 + 7 downto i * 8) <= sd_rx_data_src(i * 8 + 7 downto i * 8);
         sd_rx_kcntl_dst(i)                     <= sd_rx_kcntl_src(i);
       end generate NO_TRUDY_AND_EVE;
-
-      -- Reset signal for SGMII core
-      -- rst_n_sgmii_i
-
---      rst_n_sgmii_i(i) <= link_rx_ready(i) when (LINK_MODE(i) = c_IS_SLAVE) else
---                          TX_LINK_READY_IN when (LINK_MODE(i) = c_IS_MASTER) else 
---                          '0';
       
       -- SGMII core
       SGMII_GBE_PCS : sgmii_gbe_pcs42
       port map(
-        rst_n                   => RESET_N, --CLEAR_N,
-        signal_detect           => serdes_active(i), --link_rx_ready(i),
+        rst_n                   => RESET_N,
+        signal_detect           => serdes_active(i),
         gbe_mode                => '1',
         sgmii_mode              => '0',
         operational_rate        => b"10",
@@ -734,12 +728,12 @@ begin
         rx_disp_err             => sd_rx_disp_error(i), -- RX disparity error from SerDes
         rx_cv_err               => sd_rx_cv_error(i), -- RX code violation error from SerDes
         -- Autonegotiation stuff
-        mr_an_complete          => open,
+        mr_an_complete          => mr_an_complete_i(i), --open,
         mr_page_rx              => mr_page_rx_i(i), --open,
         mr_lp_adv_ability       => open,
         mr_main_reset           => RESET, --CLEAR,
         mr_an_enable            => serdes_active(i), --link_rx_ready(i), --'1',
-        mr_restart_an           => '0',
+        mr_restart_an           => an_restart_i(i), --'0',
         mr_adv_ability          => x"0020"
       );
 
@@ -827,15 +821,28 @@ begin
       port map(
         CLK                  => MASTER_CLK_IN,
         RESET                => RESET,
-        -- 
-        MAC_AN_COMPLETE_IN   => an_link_ok_i(i),
+        SERDES_ACTIVE_IN     => serdes_active(i),
+        AN_COMPLETE_IN       => an_link_ok_i(i),
         MAC_READY_CONF_IN    => mac_ready_conf(i),
+        AN_RESTART_OUT       => an_restart_i(i),
         MAC_RECONF_OUT       => mac_reconf(i),
-        --
         LINK_ACTIVE_OUT      => link_active(i),
-        --
         DEBUG                => open
       );
+      
+--      THE_FW_GBE_LSM: entity gbe_lsm
+--      port map(
+--        CLK                  => MASTER_CLK_IN,
+--        RESET                => RESET,
+--        -- 
+--        MAC_AN_COMPLETE_IN   => an_link_ok_i(i),
+--        MAC_READY_CONF_IN    => mac_ready_conf(i),
+--        MAC_RECONF_OUT       => mac_reconf(i),
+--        --
+--        LINK_ACTIVE_OUT      => link_active(i),
+--        --
+--        DEBUG                => open
+--      );
 
       -- RX ringbuffer
       THE_FW_RB: entity rx_rb