TDC readout fsm history registers added

diff --git a/trb3/TdcSlowControl.tex b/trb3/TdcSlowControl.tex
index ed633f1638d572ba2e7d6b164209586f214c922d..bf30bf6af5aa043bd78b60ffa7882572013ff586 100644 (file)
--- a/trb3/TdcSlowControl.tex
+++ b/trb3/TdcSlowControl.tex
@@ -214,14 +214,19 @@ window feature.}\\
                                &                                       & 31-24 & reserved\\ \hline
       \multirow{3}{*}{0xc10e}  & \multirow{3}{3.5cm}{Total empty channels}     & 23-0  & Number of empty channels since the last reset signal\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{2}{*}{0xc10f}  & \multirow{2}{3.5cm}{Release Number}   & 23-0  & Number of release signals sent\\
+      \multirow{2}{*}{0xc10f}  & \multirow{2}{3.5cm}{Release number}   & 23-0  & Number of release signals sent\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{3}{*}{0xc110}  & \multirow{3}{3.5cm}{Readout Time}     & 23-0  & Total time length, that the readout occured (with granularity of 10~ns)\\
+      \multirow{3}{*}{0xc110}  & \multirow{3}{3.5cm}{Readout time}     & 23-0  & Total time length, that the readout occured (with granularity of 10~ns)\\
                                &                                       & 31-24 & reserved\\ \hline
-      \multirow{3}{*}{0xc111}  & \multirow{3}{3.5cm}{Timeout Number}   & 23-0  & Number of timeouts detected (too long delay after the timing trigger)\\
+      \multirow{3}{*}{0xc111}  & \multirow{3}{3.5cm}{Timeout number}   & 23-0  & Number of timeouts detected (too long delay after the timing trigger)\\
                                &                                       & 31-24 & reserved\\ \hline
       \multirow{2}{*}{0xc112}  & \multirow{2}{3.5cm}{Finished number}  & 23-0  & Number of sent finished signals\\
-                               &                                       & 31-24 & reserved\\ \hline
+                               &                                       &
+                                31-24  & reserved\\ \hline
+      \multirow{2}{*}{0xc113}  & \multirow{2}{3.5cm}{READ FSM history} & \multirow{2}{*}{31-0}
+      & History register for the last 8 states of the READ FSM debug word.\\ \hline
+      \multirow{2}{*}{0xc114}  & \multirow{2}{3.5cm}{WRITE FSM history}        & \multirow{2}{*}{31-0}
+      & History register for the last 8 states of the WRITE FSM debug word.\\ \hline
 
     \end{tabularx}
   \caption{The status registers of the TDC. (Continue)}