+++ /dev/null
-#!/usr/bin/perl
-use strict;
-use warnings;
-use lib "./libs/";
-use Config::Abstract::Ini;
-use POSIX qw(strftime);
-use FileHandle;
-use Getopt::Long;
-
-my $opt_help;
-my $opt_chain;
-my $opt_board;
-my $opt_operation;
-my $opt_addr;
-my $opt_quiet;
-GetOptions ('h|help' => \$opt_help,
- 'b|board=s' => \$opt_board,
- 'c|chain=s' => \$opt_chain,
- 'o|operation=s' => \$opt_operation,
- 'a|addr=s' => \$opt_addr,
- 'q|quiet' => \$opt_quiet
- );
-if($opt_help) {
- &help();
- exit(0);
-}
-
-
-
-sub help(){
- print "Usage: ui.pl [-c <chain name> ] [-o <Operation>] [-a <address>]
-
-required:
- [-c|--chain <JTAG chain name>] : Select the JTAG chain (controller) whose RAM should be written.
- [-b|--board <JTAG board name>] : Select the JTAG/MAIN board for setting signals.
- [-o|--operation <handle name from gui.pl without h_>] : Select operation (on the selected JTAG chain).
- [-a|--addr <address for operation>] : read_ram1b_word needs address
- [-q|--quiet ] : suppress informative output
-
-"
-}
-
-#print "operation:".$opt_operation."\n";
-
-sub int_to_32bit_hex($) {
- my ($in) = @_;
- my $hex = sprintf("%.8X", $in);
- return $hex;
-}
-
-sub report {
- if(defined($opt_quiet)){
- if($_[0] eq 'data') { print $_[1]; }
- }
- else {
- print $_[1];
- }
-}
-sub reportd {
- if(!defined($opt_quiet)){
- print "debug:" . $_[0];
- }
-}
-sub init_msg {
- if(!defined($opt_quiet)){
- print $_[0];
- }
-}
-sub execute_shell_command {
- # input args: $command, $expected_output #, $success_string, $sending_button
-
- my $success = 0;
- my $command = $_[0];
- my $expected = $_[1];
- my $output = "";
- #my $success_string = $_[1];
- #my $sending_button = $_[2];
-
- #my $message= $sending_button->get_label;
- #reportd ( 'report_general', "attempting to $message");
- report( 'report_detailed' , "\nexec $command\n\n");
- open ( SHELL , "$command 2>&1 |" ) || report( 'report_general' , "failed to execute command.");
-
- while ( <SHELL> ) {
- report( 'report_detailed' , $_);
- $output.=$_;
-# if ( $_ =~ m/$success_string/ ) {
-# report( 'report_general' , " ...success!\n" );
-# my $success = 1;
-# }
- }
-# if ($success == 0) {
-# report( 'report_general', " ...unclear\n");
-# }
- if(!($output eq $expected)) {
- report('report_general', "unexpected output: ".$output."\n");
- }
- report( 'report_detailed' , "\n----------------------------\n");
-}
-
-
-sub execute_shell_command_return {
- my $command = $_[0];
- report( 'report_detailed' , "\nexec $command\n\n");
- my $result = `$command 2>&1`;
- report( 'report_detailed' , $result);
- report( 'report_detailed' , "\n----------------------------\n");
- if($? != 0) {report('report_general', "command failed. output: $result");}
- return $result;
-}
-
-
-sub generate_h_read_ram1b_word {
- my ($chain, $fpga_addr, $debug_ram1baddr, $debug_ram1bdata, $addr) = @_;
- return sub {
- init_msg( "read ram1b word " . $chain);
- execute_shell_command("trbcmd w $fpga_addr $debug_ram1baddr $addr", "");
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $debug_ram1bdata");
- report('report_general', "regval: ". substr($regval, 8, 10). "\n");
- report('data', substr($regval, 8, 10));
- }
-}
-sub generate_h_read_ram1c_word {
- my ($chain, $fpga_addr, $debug_ram1caddr, $debug_ram1cdata, $addr) = @_;
- return sub {
- init_msg( "read ram1b word " . $chain);
- execute_shell_command("trbcmd w $fpga_addr $debug_ram1caddr $addr", "");
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $debug_ram1cdata");
- report('report_general', "regval: ". substr($regval, 8, 10). "\n");
- report('data', substr($regval, 8, 10));
- }
-}
-
-
-sub generate_h_copy_ram1b1c {
- my ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $addr) = @_;
- return sub {
- init_msg( "read ram1b word " . $chain);
- execute_shell_command("trbcmd w $fpga_addr $data_reg_addr 0x00000008", ""); # unconditional trigger
- execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x00000064", ""); # M26C_CMD_COPY_RAM1B1C_SINGLE_TRIGGER
- }
-}
-
-
-sub generate_h_man_maps_reset {
- my ($chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg( "manual reset chain " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $resetnormal = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $resetinv = int_to_32bit_hex((~(1<<10)) & hex($resetnormal));
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$resetinv 2>&1 && sleep 1 && trbcmd w $fpga_addr $conf_signals_addr $resetnormal 2>&1", "");
- }
-}
-
-sub generate_h_maps_start_signal {
- my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg( "generate MAPS start $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<9)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<9)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$newval\n", "");
- }
-}
-sub generate_h_maps_reset_signal {
- my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg("MAPS reset signal $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<11)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<11)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$newval", "");
- }
-}
-sub generate_h_maps_clk_signal {
- my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg("generate MAPS clk $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
-
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<13)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<13)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$newval\n", "");
- }
-}
-sub generate_h_prog_ram {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $ram_base_addr, $ram_addr, $numsensors, $memfilenames_ref) = @_;
- my @memfilenames = @{$memfilenames_ref};
- return sub {
- init_msg("program RAM $chain.");
- my $numchips_hex = int_to_32bit_hex($numsensors);
- execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A", ""); # CMD_STOP
- execute_shell_command("trbcmd w $fpga_addr $data_reg_addr 0x$numchips_hex", ""); # ADDR_CONTROL_DATA_REGISTER
- execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x00000033", ""); # COMMAND: M26C_CMD_SET_NUMCHIPS_CONFIGURED
- for(my $i=0;$i<scalar @memfilenames;$i++) {
-
- # write RAM base pointer
- my $ihex = int_to_32bit_hex($i);
- reportd "set RAM base pointer: \n";
- execute_shell_command("trbcmd w $fpga_addr $ram_base_addr 0x$ihex", "");
- # write to configuration RAM
- reportd "write max. 256 32-bit-words: \n";
- execute_shell_command("trbcmd wm $fpga_addr $ram_addr 0 $memfilenames[$i]", "");
- }
- execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x00000009", ""); # CMD_START
- }
-}
-
-sub generate_h_set_timing_10mhz {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_;
- return sub {
- init_msg("timing 10 MHz $chain.");
- my $cmdline = "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 # COMMAND: M26C_CMD_STOP
-trbcmd w $fpga_addr $data_reg_addr 0x0000000A 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000040 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
-trbcmd w $fpga_addr $data_reg_addr 0x00000003 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000042 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000008 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000044 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000004 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000046 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000004 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000048 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000004 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004a 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME3
-trbcmd w $fpga_addr $data_reg_addr 0x00000009 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004c 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SET_DATA_TIME
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000009 2>&1 # COMMAND: M26C_CMD_START";
- #reportd $cmdline;
- #system($cmdline);
- execute_shell_command($cmdline, "");
- }
-}
-
-sub generate_h_set_timing_1mhz {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_;
- return sub {
- init_msg("timing 1 MHz $chain.");
- my $cmdline = "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 # COMMAND: M26C_CMD_STOP
-trbcmd w $fpga_addr $data_reg_addr 0x00000064 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000040 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
-trbcmd w $fpga_addr $data_reg_addr 0x00000031 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000042 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000062 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000044 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000030 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000046 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000030 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000048 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000030 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004a 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME3
-trbcmd w $fpga_addr $data_reg_addr 0x00000063 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004c 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SET_DATA_TIME
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000009 2>&1 # COMMAND: M26C_CMD_START";
- execute_shell_command($cmdline, "");
- }
-}
-
-sub generate_h_set_timing_100khz {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_;
- return sub {
- init_msg("timing 100 kHz $chain.");
- my $cmdline = "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 # COMMAND: M26C_CMD_STOP
-trbcmd w $fpga_addr $data_reg_addr 0x000003E8 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000040 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
-trbcmd w $fpga_addr $data_reg_addr 0x000001CC 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000042 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x000003C0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000044 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x000001F0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000046 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x000001F0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000048 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x000001F0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004a 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME3
-trbcmd w $fpga_addr $data_reg_addr 0x000003E7 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004c 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SET_DATA_TIME
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000009 2>&1 # COMMAND: M26C_CMD_START";
- execute_shell_command($cmdline, "");
- }
-}
-
-
-
-sub generate_h_delay {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $delay) = @_;
- return sub {
- init_msg("Delay $delay $chain.");
- my $cmdline = "trbcmd w $fpga_addr $data_reg_addr 0x".int_to_32bit_hex($delay)." 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000067 2>&1 # COMMAND: M26C_CMD_SET_DELAY_EXPECTED_VALUES";
- execute_shell_command($cmdline, "");
- }
-}
-
-sub generate_h_waitbeforestart_6us {
-
- my($board, $fpga_addr, $conf_waitstart_addr) = @_;
- return sub {
- init_msg("Wait before start $board 6us.");
- if(!defined($conf_waitstart_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # Set time to wait after finished programming before sending MAPS_start
- execute_shell_command("trbcmd w $fpga_addr $conf_waitstart_addr 0x00000200", ""); # wait before start (counted with 80 MHz)
-
- }
-}
-sub generate_h_waitbeforestart_1ms {
-
- my($board, $fpga_addr, $conf_waitstart_addr) = @_;
- return sub {
- init_msg("Wait before start $board 1ms.");
- if(!defined($conf_waitstart_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # Set time to wait after finished programming before sending MAPS_start
- execute_shell_command("trbcmd w $fpga_addr $conf_waitstart_addr 0x00013880", ""); # wait before start (counted with 80 MHz)
-
- }
-}
-
-sub generate_h_waitbeforestart_1s {
-
- my($board, $fpga_addr, $conf_waitstart_addr) = @_;
- return sub {
- init_msg("Wait before start $board 1s.");
- if(!defined($conf_waitstart_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # Set time to wait after finished programming before sending MAPS_start
- execute_shell_command("trbcmd w $fpga_addr $conf_waitstart_addr 0x04C4B400", ""); # wait before start (counted with 80 MHz)
-
- }
-}
-
-sub generate_h_maps_reset {
- my ($onoroff, $chain, $chainnr, $fpga_addr, $conf_resets_addr) = @_;
- return sub {
- init_msg("initseq setting: MAPS reset addr $conf_resets_addr $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_resets_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<$chainnr)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<$chainnr)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_resets_addr 0x$newval", "");
- }
-}
-
-
-sub generate_h_trig {
- my ($board, $fpga_addr, $conf_trigger_addr) = @_;
- return sub {
- init_msg("generate trigger addr $conf_trigger_addr " . $board);
- # hack: for runjtag trigger single trigger address is used, otherwise setting LSB would be sufficient
- execute_shell_command("trbcmd w $fpga_addr $conf_trigger_addr 0xFFFFFFFF", "");
- }
-}
-sub generate_h_chain_trig {
- my ($chain, $chainnr, $fpga_addr, $conf_trigger_addr) = @_;
- return sub {
- init_msg("generate trigger addr $conf_trigger_addr chainnr:$chainnr " . $chain);
- # set bit in trigger register correspondig to chain-# $chainnr
- my $newval;
- $newval = int_to_32bit_hex(((1<<$chainnr)));
- execute_shell_command("trbcmd w $fpga_addr $conf_trigger_addr 0x$newval", "");
- }
-}
-
-
-
-sub generate_h_trigger_init_sequence {
- my($board, $fpga_addr, $conf_fet_trigger_addr, $conf_period_addr) = @_;
- return sub {
- init_msg("Send Trigger $board.");
- if(!defined($conf_fet_trigger_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # generate trigger
- execute_shell_command("trbcmd w $fpga_addr $conf_fet_trigger_addr 0x00000001", ""); # generate fet_trigger via trbnet
- }
-}
-
-
-sub generate_h_set_inout {
- my($chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg("Set IN/OUT $chain.");
- if(!defined($conf_signals_addr)){
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x000002EAA", "");# outputs/inputs not inverted, but activated, RESET activated and inverted (high)
- }
-}
-
-sub generate_h_prog_fpga {
- my($board, $trbhostname, $addonortrb, $staplfilename) = @_;
- return sub {
- init_msg("Prog FPGA $board.");
- if(!defined($trbhostname)||!defined($addonortrb)||!defined($staplfilename)){
- report('report_general', "Settings missing. Doing nothing.\n");
- return;
- }
- execute_shell_command("command_client.pl -e $trbhostname -c \"jam_trbv2_ao --$addonortrb -aRUN_XILINX_PROC /home/hadaq/bneumann/$staplfilename\"",
- "------------- Connection accepted -------------
-> return value of command: 0
-> stdout:
-Successful File Execution.
-------------- END OF OUTPUT ------------
-");
- }
-}
-sub generate_h_prog_ram_external {
- my ($chain) = @_;
- return sub {
- my $output = execute_shell_command_return("./ui_writeram.pl -c $chain");
- reportd $output;
- }
-}
-
-
-sub generate_h_start_trbnetd {
- my($board, $trbhostname) = @_;
- return sub {
- init_msg("Start trbnetd $board.");
- if(!defined($trbhostname)){
- report('report_general',"Settings missing. Doing nothing.\n");
- return;
- }
- execute_shell_command("command_client.pl -e $trbhostname -c \"trbnetd\"","------------- Connection accepted -------------
-> return value of command: 0
-------------- END OF OUTPUT ------------
-");
- }
-}
-
-# sub generate_h_set_standard {
-# my %boards_handlers = %{$_[0]};
-# my %chains_handlers = %{$_[1]};
-# return sub {
-# foreach my $board (reverse sort keys %chains_handlers) {
-# my %chains_handlers2 = %{$chains_handlers{$board}};
-# foreach my $chain (reverse sort keys %chains_handlers2) {
-# my %chain_handlers = %{$chains_handlers2{$chain}};
-# foreach my $handler_name (@{$chain_defaults{$board}{$chain}}) {
-# &{$chain_handlers{$handler_name}}; # run subroutine saved in hash
-# }
-# }
-# }
-# foreach my $board (reverse sort keys %boards_handlers) {
-# my %board_handlers = %{$boards_handlers{$board}};
-# foreach my $handler_name (@{$board_defaults{$board}}) {
-# &{$board_handlers{$handler_name}}; # run subroutine saved in hash
-# }
-# }
-# foreach my $board (reverse sort keys %chains_handlers) {
-# my %chains_handlers2 = %{$chains_handlers{$board}};
-# foreach my $chain (reverse sort keys %chains_handlers2) {
-# my %chain_handlers = %{$chains_handlers2{$chain}};
-# foreach my $handler_name (@{$chain_defaults2{$board}{$chain}}) {
-# &{$chain_handlers{$handler_name}}; # run subroutine saved in hash
-# }
-# }
-# }
-# }
-# }
-
-my $boardsfile= 'boards.ini';
-my $boardsSettings = new Config::Abstract::Ini($boardsfile);
-my %allboards = $boardsSettings->get_all_settings;
-foreach my $board (keys %allboards) {
- my %settings=%{$allboards{$board}};
- my $chainsini = $settings{'chainsini'};
- my $trbhostname = $settings{'FPGAboard_hostname'};
- my $addonortrb = $settings{'FPGAboard_addonortrb'};
- my $staplfilename = $settings{'FPGAboard_staplfilename'};
- my $fpga_addr = $settings{'FPGAtrbnetAddr'};
- my $conf_period_addr = $settings{'CONFperiod_trbnetAddr'};
- my $conf_offspillcounter_addr = $settings{'CONFoffspillcounter_trbnetAddr'};
- my $conf_waitstart_addr = $settings{'CONFwaitstart_trbnetAddr'};
- my $conf_triginitseq_addr = $settings{'CONFtriginitseq_trbnetAddr'};
- my $conf_trigmapsreset_addr = $settings{'CONFtrigmapsreset_trbnetAddr'};
- my $conf_trigrunjtag_addr = $settings{'CONFtrigrunjtag_trbnetAddr'};
- my $conf_trigwriteonce_addr = $settings{'CONFtrigwriteonce_trbnetAddr'};
- my $conf_trigmapsstart_addr = $settings{'CONFtrigmapsstart_trbnetAddr'};
-
- if(defined($opt_board) and not defined($opt_chain)) {
- # assume board command
- my $subr;
- if(("h_".$opt_operation) eq 'h_prog_fpga') {
- $subr = generate_h_prog_fpga($board, $trbhostname, $addonortrb, $staplfilename)
- }
- elsif(("h_".$opt_operation) eq 'h_start_trbnetd'){
- $subr = generate_h_start_trbnetd($board, $trbhostname);
- }
- elsif(("h_".$opt_operation) eq 'h_waitbeforestart_6us' ) {
- $subr = generate_h_waitbeforestart_6us($board, $fpga_addr, $conf_waitstart_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_waitbeforestart_1ms' ) {
- $subr = generate_h_waitbeforestart_1ms($board, $fpga_addr, $conf_waitstart_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_waitbeforestart_1s' ) {
- $subr = generate_h_waitbeforestart_1s($board, $fpga_addr, $conf_waitstart_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_trigger_init_sequence' ) {
- $subr = generate_h_trig($board, $fpga_addr, $conf_triginitseq_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_reset' ) {
- $subr = generate_h_trig($board, $fpga_addr, $conf_trigmapsreset_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_run_jtag' ) {
- $subr = generate_h_trig($board, $fpga_addr, $conf_trigrunjtag_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_write_once' ) {
- $subr = generate_h_trig($board, $fpga_addr, $conf_trigwriteonce_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_start' ) {
- $subr = generate_h_trig($board, $fpga_addr, $conf_trigmapsstart_addr);
- }
- if(!defined($opt_quiet)){ print "Starting Board Operation.\n"; }
- &{$subr}();
- exit(0);
- }
-
-
- my $chainsSettings = new Config::Abstract::Ini($chainsini);
- my %allchains = $chainsSettings->get_all_settings;
- if(!defined($allchains{$opt_chain})) { die ("Chain $opt_chain not found.");}
-# foreach my $chain (reverse sort keys %allchains) {
- my $chain = $opt_chain;
- my %chain_settings=%{$allchains{$chain}};
- my $chain_fpga_addr = $chain_settings{'FPGAtrbnetAddr'};
- my $ram_addr = $chain_settings{'RAMtrbnetAddr'};
- my $cmd_reg_addr = $chain_settings{'CMDreg_trbnetAddr'};
- my $ram_base_addr = $chain_settings{'RAMbase_trbnetAddr'};
- my $data_reg_addr = $chain_settings{'DATAreg_trbnetAddr'};
- my $conf_signals_addr = $chain_settings{'CONFsignals_trbnetAddr'};
- my $conf_resetafterfirstwrite_addr = $chain_settings{'CONFresetafterfirstwrite_trbnetAddr'};
- my $conf_resetbeforeinit_addr = $chain_settings{'CONFresetbeforeinit_trbnetAddr'};
- my $conf_chain_triginitseq_addr = $chain_settings{'CONFtriginitseq_trbnetAddr'};
- my $conf_chain_trigmapsreset_addr = $chain_settings{'CONFtrigmapsreset_trbnetAddr'};
- my $conf_chain_trigrunjtag_addr = $chain_settings{'CONFtrigrunjtag_trbnetAddr'};
- my $conf_chain_trigwriteonce_addr = $chain_settings{'CONFtrigwriteonce_trbnetAddr'};
- my $conf_chain_trigmapsstart_addr = $chain_settings{'CONFtrigmapsstart_trbnetAddr'};
- my $debug_chain_ram1baddr_addr = $chain_settings{'DEBUGram1baddr'};
- my $debug_chain_ram1bdata_addr = $chain_settings{'DEBUGram1bdata'};
- my $debug_chain_ram1caddr_addr = $chain_settings{'DEBUGram1caddr'};
- my $debug_chain_ram1cdata_addr = $chain_settings{'DEBUGram1cdata'};
- my $chainnr = $chain_settings{'chainnr'};
- my $subr;
- if(("h_".$opt_operation) eq 'h_man_maps_reset') {
- $subr = generate_h_man_maps_reset($chain, $chain_fpga_addr, $conf_signals_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_delay0' ) {
- $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 0);
- }
- elsif(("h_".$opt_operation) eq 'h_delay1' ) {
- $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 1);
- }
- elsif(("h_".$opt_operation) eq 'h_delay2' ) {
- $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 2);
- }
- elsif(("h_".$opt_operation) eq 'h_delay3' ) {
- $subr = generate_h_delay ($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr, 3);
- }
- elsif(("h_".$opt_operation) eq 'h_prog_ram' ) {
- $subr = generate_h_prog_ram_external($chain);
- }
- elsif(("h_".$opt_operation) eq 'h_set_timing_10mhz' ) {
- $subr = generate_h_set_timing_10mhz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_set_timing_1mhz' ) {
- $subr = generate_h_set_timing_1mhz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_set_timing_100khz' ) {
- $subr = generate_h_set_timing_100khz($chain, $chain_fpga_addr,$cmd_reg_addr, $data_reg_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_set_inout' ) {
- $subr = generate_h_set_inout($chain, $chain_fpga_addr, $conf_signals_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_reset_before_on' ) {
- $subr = generate_h_maps_reset(1,$chain, $chainnr, $chain_fpga_addr, $conf_resetbeforeinit_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_reset_before_off' ) {
- $subr = generate_h_maps_reset(0,$chain, $chainnr, $chain_fpga_addr, $conf_resetbeforeinit_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_reset_after_on' ) {
- $subr = generate_h_maps_reset(1,$chain, $chainnr, $chain_fpga_addr, $conf_resetafterfirstwrite_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_reset_after_off' ) {
- $subr = generate_h_maps_reset(0,$chain, $chainnr, $chain_fpga_addr, $conf_resetafterfirstwrite_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_clk_on' ) {
- $subr = generate_h_maps_clk_signal(1,$chain, $chain_fpga_addr, $conf_signals_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_clk_off' ) {
- $subr = generate_h_maps_clk_signal(0,$chain, $chain_fpga_addr, $conf_signals_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_trig_init_seq' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_triginitseq_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_reset' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigmapsreset_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_run_jtag' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigrunjtag_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_write_once' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigwriteonce_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_maps_start' ) {
- $subr = generate_h_chain_trig($chain, $chainnr, $chain_fpga_addr, $conf_chain_trigmapsstart_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_read_ram1b_word' ) {
- $subr = generate_h_read_ram1b_word($chain, $chain_fpga_addr, $debug_chain_ram1baddr_addr, $debug_chain_ram1bdata_addr, $opt_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_read_ram1c_word' ) {
- $subr = generate_h_read_ram1c_word($chain, $chain_fpga_addr, $debug_chain_ram1caddr_addr, $debug_chain_ram1cdata_addr, $opt_addr);
- }
- elsif(("h_".$opt_operation) eq 'h_copy_ram1b1c' ) {
- $subr = generate_h_copy_ram1b1c($chain, $chain_fpga_addr, $cmd_reg_addr, $data_reg_addr);
- }
-
- if(!defined($opt_quiet)){ print "Starting Chain Operation.\n"; }
- &{$subr}();
-
-}
+++ /dev/null
-#!/usr/bin/perl
-use strict;
-use warnings;
-use lib "./libs/";
-use Config::Abstract::Ini;
-use POSIX qw(strftime);
-use FileHandle;
-
-$ENV{DAQOPSERVER}='trb124';
-if(not( -e "/tmp/jtag_initmem")) {
- system("mkdir /tmp/jtag_initmem");
-}
-#push(@INC, "./BN");
-#use lib "$ENV{PWD}/BN";
-#use lib "/d/sugar/bneumann/vhdl/jtag_proj/trb_maps_jtag2/ui/";
-#use lib "/d/sugar/bneumann/vhdl/jtag_proj/trb_maps_jtag2/ui/BN/blib/arch";
-#use lib "/d/sugar/bneumann/vhdl/jtag_proj/trb_maps_jtag2/ui/";
-#use lib "/d/sugar/bneumann/vhdl/jtag_proj/trb_maps_jtag2/ui/BN/blib/arch";
-
-use lib "BN/blib/arch";
-use BN::CRC32;
-#use String::CRC32;
-
-#use feature "state";
-use POSIX;
-# for a pure gtk+ glade project
-use Gtk2 -init;
-use Gtk2::GladeXML;
-use Glib qw/TRUE FALSE/;
-
-
-my %chain_defaults = (); #('h_stop', 'h_delay0', 'h_prog_ram', 'h_set_timing_10mhz',,'h_set_inout');
-my %board_defaults = (); #('h_period_0_15s');
-my %chain_defaults2 = (); #('h_start');
-
-# whitespace trimming from http://www.somacon.com/p114.php
-# Declare the subroutines
-sub trim($);
-sub ltrim($);
-sub rtrim($);
-
-# Create a test string
-my $string = " \t Hello world! ";
-
-# Here is how to output the trimmed text "Hello world!"
-#print trim($string)."\n";
-#print ltrim($string)."\n";
-#print rtrim($string)."\n";
-
-# Perl trim function to remove whitespace from the start and end of the string
-sub trim($)
-{
- my $string = shift;
- $string =~ s/^\s+//;
- $string =~ s/\s+$//;
- return $string;
-}
-# Left trim function to remove leading whitespace
-sub ltrim($)
-{
- my $string = shift;
- $string =~ s/^\s+//;
- return $string;
-}
-# Right trim function to remove trailing whitespace
-sub rtrim($)
-{
- my $string = shift;
- $string =~ s/\s+$//;
- return $string;
-}
-
-sub reverse32bit($) {
- my ($in) = @_;
- my $result = unpack("L", pack("B*", scalar reverse unpack("B*", pack("L",$in))));
- return $result;
- #return 1;
-}
-
-sub int_to_32bit_hex($) {
- my ($in) = @_;
- my $hex = sprintf("%.8X", $in);
- return $hex;
-}
-
-my $num_words = 0;
-
-# this subroutine
-# changes parameter 0, which holds the file handle
-sub memfile_writeline($$$$) {
- my($memfile, $memfilenames, $memfiles_prefix, $line_string)=@_;
- my $filenum = floor($num_words/256);
- my $last_filenum = floor(($num_words-1)/256);
- my $filenum_str = sprintf "%0.2d", $filenum;
- my $memfilename = $memfiles_prefix.'.'.$filenum_str.".txt";
-
- if((!defined $_[0])) {
- if( -e ($memfilename)) {
- die ("Error: RAM text file \"$memfile\" exists.");
- }
- $_[0] = FileHandle->new($memfilename, 'w');
- push(@{$_[1]}, $memfilename);
- }
- elsif($filenum!=$last_filenum) {
- $memfile->close();
- if( -e ($memfilename)) {
- die ("Error: RAM text file \"$memfile\" exists.");
- }
- $_[0] = FileHandle->new($memfilename, 'w');
- push(@{$_[1]}, $memfilename);
- }
- my $fh = $_[0];
- print $fh $line_string;
- $num_words++;
-}
-my $gladexml = Gtk2::GladeXML->new('gui/design/window3_libglade.glade');
-my $textview_msg = $gladexml->get_widget('textview_msg');
-my $textview_msgdetailed = $gladexml->get_widget('textview_msgdetailed');
-my $logfilehandle = FileHandle->new('gui3log.txt', 'a');
-
-sub report {
- # log to logfile
- my $logdate = strftime "%Y%m%d%H%M%S", localtime;
- print $logfilehandle $logdate . ":". $_[1];
- # report( $textview, $string );
-
- my $textfield;
- if($_[0] eq 'report_detailed') {
- $textfield = $textview_msgdetailed;
- }
- else {
- $textfield = $textview_msg;
- }
- my $buffer = $textfield->get_buffer;
- my $sw = $textfield->get_parent;
- my $iter = $buffer->get_end_iter;
- $buffer->insert($iter,$_[1]);
-
- my $va = $sw->get_vadjustment;
- #$va->set_value (($va->upper - $va->page_size) );
-
- $va->set_value ( $va->upper );
-}
-
-sub init_msg {
- my $textfield = $textview_msg;
- my $buffer = $textfield->get_buffer;
- $buffer->set_text($_[0]."\n");
- reportd ($_[0]."\n");
-}
-
-sub reportd {
- report('report_detailed', $_[0]);
-}
-
-
-sub execute_shell_command {
- # input args: $command, $expected_output #, $success_string, $sending_button
-
- my $success = 0;
- my $command = $_[0];
- my $expected = $_[1];
- my $output = "";
- #my $success_string = $_[1];
- #my $sending_button = $_[2];
-
- #my $message= $sending_button->get_label;
- #reportd ( 'report_general', "attempting to $message");
- report( 'report_detailed' , "\nexec $command\n\n");
- open ( SHELL , "$command 2>&1 |" ) || report( 'report_general' , "failed to execute command.");
-
- while ( <SHELL> ) {
- report( 'report_detailed' , $_);
- $output.=$_;
-# if ( $_ =~ m/$success_string/ ) {
-# report( 'report_general' , " ...success!\n" );
-# my $success = 1;
-# }
- }
-# if ($success == 0) {
-# report( 'report_general', " ...unclear\n");
-# }
- if(!($output eq $expected)) {
- report('report_general', "unexpected output: ".$output."\n");
- }
- report( 'report_detailed' , "\n----------------------------\n");
-}
-
-
-sub execute_shell_command_return {
- my $command = $_[0];
- report( 'report_detailed' , "\nexec $command\n\n");
- my $result = `$command 2>&1`;
- report( 'report_detailed' , $result);
- report( 'report_detailed' , "\n----------------------------\n");
- if($? != 0) {report('report_general', "command failed. output: $result");}
- return $result;
-}
-
-
-sub generate_h_man_maps_reset {
- my ($chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg( "manual reset chain " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $resetnormal = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $resetinv = int_to_32bit_hex((~(1<<10)) & hex($resetnormal));
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$resetinv 2>&1 && sleep 1 && trbcmd w $fpga_addr $conf_signals_addr $resetnormal 2>&1", "");
- }
-}
-
-sub generate_h_maps_start_signal {
- my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg( "generate MAPS start $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<9)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<9)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$newval\n", "");
- }
-}
-sub generate_h_maps_reset_signal {
- my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg("MAPS reset signal $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<11)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<11)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$newval", "");
- }
-}
-sub generate_h_maps_clk_signal {
- my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg("generate MAPS clk $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
-
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<13)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<13)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x$newval\n", "");
- }
-}
-sub generate_h_prog_ram {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $ram_base_addr, $ram_addr, $numsensors, $memfilenames_ref) = @_;
- my @memfilenames = @{$memfilenames_ref};
- return sub {
- init_msg("program RAM $chain.");
- execute_shell_command("./ui_writeram.pl -c $chain -q", "$chain: done.\n"); # load sensor*.ini
- }
-}
-
-sub generate_h_set_timing_10mhz {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_;
- return sub {
- init_msg("timing 10 MHz $chain.");
- my $cmdline = "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 # COMMAND: M26C_CMD_STOP
-trbcmd w $fpga_addr $data_reg_addr 0x0000000A 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000040 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
-trbcmd w $fpga_addr $data_reg_addr 0x00000003 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000042 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000008 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000044 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000004 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000046 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000004 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000048 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000004 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004a 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME3
-trbcmd w $fpga_addr $data_reg_addr 0x00000009 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004c 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SET_DATA_TIME
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000009 2>&1 # COMMAND: M26C_CMD_START";
- #reportd $cmdline;
- #system($cmdline);
- execute_shell_command($cmdline, "");
- }
-}
-
-sub generate_h_set_timing_1mhz {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_;
- return sub {
- init_msg("timing 1 MHz $chain.");
- my $cmdline = "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 # COMMAND: M26C_CMD_STOP
-trbcmd w $fpga_addr $data_reg_addr 0x00000064 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000040 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
-trbcmd w $fpga_addr $data_reg_addr 0x00000031 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000042 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000062 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000044 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000030 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000046 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x00000030 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000048 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x00000030 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004a 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME3
-trbcmd w $fpga_addr $data_reg_addr 0x00000063 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004c 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SET_DATA_TIME
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000009 2>&1 # COMMAND: M26C_CMD_START";
- execute_shell_command($cmdline, "");
- }
-}
-
-sub generate_h_set_timing_100khz {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) = @_;
- return sub {
- init_msg("timing 100 kHz $chain.");
- my $cmdline = "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 # COMMAND: M26C_CMD_STOP
-trbcmd w $fpga_addr $data_reg_addr 0x000003E8 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000040 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
-trbcmd w $fpga_addr $data_reg_addr 0x000001CC 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000042 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x000003C0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000044 2>&1 # COMMAND: M26C_CMD_SET_JTAG_CLOCK_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x000001F0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000046 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME1
-trbcmd w $fpga_addr $data_reg_addr 0x000001F0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000048 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME2
-trbcmd w $fpga_addr $data_reg_addr 0x000001F0 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004a 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SAMPLE_TIME3
-trbcmd w $fpga_addr $data_reg_addr 0x000003E7 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x0000004c 2>&1 # COMMAND: M26C_CMD_SET_JTAG_SET_DATA_TIME
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000009 2>&1 # COMMAND: M26C_CMD_START";
- execute_shell_command($cmdline, "");
- }
-}
-
-
-
-sub generate_h_delay {
- my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $delay) = @_;
- return sub {
- init_msg("Delay $delay $chain.");
- my $cmdline = "trbcmd w $fpga_addr $data_reg_addr 0x".int_to_32bit_hex($delay)." 2>&1 # ADDR_CONTROL_DATA_REGISTER
-trbcmd w $fpga_addr $cmd_reg_addr 0x00000067 2>&1 # COMMAND: M26C_CMD_SET_DELAY_EXPECTED_VALUES";
- execute_shell_command($cmdline, "");
- }
-}
-
-sub generate_h_waitbeforestart_6us {
-
- my($board, $fpga_addr, $conf_waitstart_addr) = @_;
- return sub {
- init_msg("Wait before start $board 6us.");
- if(!defined($conf_waitstart_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # Set time to wait after finished programming before sending MAPS_start
- execute_shell_command("trbcmd w $fpga_addr $conf_waitstart_addr 0x00000200", ""); # wait before start (counted with 80 MHz)
-
- }
-}
-sub generate_h_waitbeforestart_1ms {
-
- my($board, $fpga_addr, $conf_waitstart_addr) = @_;
- return sub {
- init_msg("Wait before start $board 1ms.");
- if(!defined($conf_waitstart_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # Set time to wait after finished programming before sending MAPS_start
- execute_shell_command("trbcmd w $fpga_addr $conf_waitstart_addr 0x00013880", ""); # wait before start (counted with 80 MHz)
-
- }
-}
-
-sub generate_h_waitbeforestart_1s {
-
- my($board, $fpga_addr, $conf_waitstart_addr) = @_;
- return sub {
- init_msg("Wait before start $board 1s.");
- if(!defined($conf_waitstart_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # Set time to wait after finished programming before sending MAPS_start
- execute_shell_command("trbcmd w $fpga_addr $conf_waitstart_addr 0x04C4B400", ""); # wait before start (counted with 80 MHz)
-
- }
-}
-
-sub generate_h_maps_reset {
- my ($onoroff, $chain, $chainnr, $fpga_addr, $conf_resets_addr) = @_;
- return sub {
- init_msg("initseq setting: MAPS reset addr $conf_resets_addr $onoroff " . $chain);
- # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
- my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_resets_addr");
- reportd "regval: ". substr($regval, 8, 10). "\n";
- my $before = substr($regval, 8, 10);
-# my $resetinv = int_to_32bit_hex((~(0b10000000000)) & hex_to_32bit_int($resetnormal));
- my $newval;
- if($onoroff == 0) {
- #off
- $newval = int_to_32bit_hex((~(1<<$chainnr)) & hex($before));
- }
- else {
- #on
- $newval = int_to_32bit_hex(((1<<$chainnr)) | hex($before));
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_resets_addr 0x$newval", "");
- }
-}
-
-
-sub generate_h_trig {
- my ($board, $fpga_addr, $conf_trigger_addr) = @_;
- return sub {
- init_msg("generate trigger addr $conf_trigger_addr " . $board);
- # hack: for runjtag trigger single trigger address is used, otherwise setting LSB would be sufficient
- execute_shell_command("trbcmd w $fpga_addr $conf_trigger_addr 0xFFFFFFFF", "");
- }
-}
-sub generate_h_chain_trig {
- my ($chain, $chainnr, $fpga_addr, $conf_trigger_addr) = @_;
- return sub {
- init_msg("generate trigger addr $conf_trigger_addr chainnr:$chainnr " . $chain);
- # set bit in trigger register correspondig to chain-# $chainnr
- my $newval;
- $newval = int_to_32bit_hex(((1<<$chainnr)));
- execute_shell_command("trbcmd w $fpga_addr $conf_trigger_addr 0x$newval", "");
- }
-}
-
-
-
-sub generate_h_trigger_init_sequence {
- my($board, $fpga_addr, $conf_fet_trigger_addr, $conf_period_addr) = @_;
- return sub {
- init_msg("Send Trigger $board.");
- if(!defined($conf_fet_trigger_addr)) {
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- # generate trigger
- execute_shell_command("trbcmd w $fpga_addr $conf_fet_trigger_addr 0x00000001", ""); # generate fet_trigger via trbnet
- }
-}
-
-
-sub generate_h_set_inout {
- my($chain, $fpga_addr, $conf_signals_addr) = @_;
- return sub {
- init_msg("Set IN/OUT $chain.");
- if(!defined($conf_signals_addr)){
- report('report_general', "TrbNet address missing. Doing nothing.\n");
- return;
- }
- execute_shell_command("trbcmd w $fpga_addr $conf_signals_addr 0x000002EAA", "");# outputs/inputs not inverted, but activated, RESET activated and inverted (high)
- }
-}
-
-sub generate_h_prog_fpga {
- my($board, $trbhostname, $addonortrb, $staplfilename) = @_;
- return sub {
- init_msg("Prog FPGA $board.");
- if(!defined($trbhostname)||!defined($addonortrb)||!defined($staplfilename)){
- report('report_general', "Settings missing. Doing nothing.\n");
- return;
- }
- execute_shell_command("command_client.pl -e $trbhostname -c \"jam_trbv2_ao --$addonortrb -aRUN_XILINX_PROC /home/hadaq/bneumann/$staplfilename\"",
- "------------- Connection accepted -------------
-> return value of command: 0
-> stdout:
-Successful File Execution.
-------------- END OF OUTPUT ------------
-");
- }
-}
-sub generate_h_start_trbnetd {
- my($board, $trbhostname) = @_;
- return sub {
- init_msg("Start trbnetd $board.");
- if(!defined($trbhostname)){
- report('report_general',"Settings missing. Doing nothing.\n");
- return;
- }
- execute_shell_command("command_client.pl -e $trbhostname -c \"trbnetd\"","------------- Connection accepted -------------
-> return value of command: 0
-------------- END OF OUTPUT ------------
-");
- }
-}
-
-sub generate_h_set_standard {
- my %boards_handlers = %{$_[0]};
- my %chains_handlers = %{$_[1]};
- return sub {
- foreach my $board (reverse sort keys %chains_handlers) {
- my %chains_handlers2 = %{$chains_handlers{$board}};
- foreach my $chain (reverse sort keys %chains_handlers2) {
- my %chain_handlers = %{$chains_handlers2{$chain}};
- foreach my $handler_name (@{$chain_defaults{$board}{$chain}}) {
- &{$chain_handlers{$handler_name}}; # run subroutine saved in hash
- }
- }
- }
- foreach my $board (reverse sort keys %boards_handlers) {
- my %board_handlers = %{$boards_handlers{$board}};
- foreach my $handler_name (@{$board_defaults{$board}}) {
- &{$board_handlers{$handler_name}}; # run subroutine saved in hash
- }
- }
- foreach my $board (reverse sort keys %chains_handlers) {
- my %chains_handlers2 = %{$chains_handlers{$board}};
- foreach my $chain (reverse sort keys %chains_handlers2) {
- my %chain_handlers = %{$chains_handlers2{$chain}};
- foreach my $handler_name (@{$chain_defaults2{$board}{$chain}}) {
- &{$chain_handlers{$handler_name}}; # run subroutine saved in hash
- }
- }
- }
- }
-}
-
- # outputs/inputs not inverted, but activated, RESET deactivated and inverted (high)
-sub h_reload_boardsini {
- my ($widget, $data) = @_;
- init_msg("reload!\n");
- system("./generate_chainorder.pl");
- my $boardsfile= 'boards.ini';
- my $chainsSettings = new Config::Abstract::Ini($boardsfile);
- my %allboards = $chainsSettings->get_all_settings;
-
- my $notebook_boards = Gtk2::Notebook->new;
- my $main_vbox1 = $gladexml->get_widget('vbox1');
- my @children = $main_vbox1->get_children;
- $main_vbox1->remove($children[0]);
- $main_vbox1->pack_start($notebook_boards, TRUE, TRUE, 0);
- $main_vbox1->reorder_child($notebook_boards,0);
- $main_vbox1->resize_children();
-# my $testframe = Gtk2::Frame->new;
-# my $testframe2 = Gtk2::Frame->new;
-# $notebook_boards->append_page($testframe, "Test 1");
-# $notebook_boards->append_page($testframe2, "Test 2");
- my %boards_handlers;
- my %chains_handlers;
- foreach my $board (keys %allboards) {
- my $gladexml3 = Gtk2::GladeXML->new('gui/design/buttons_BM_NP1_board_libglade.glade');
- my %settings=%{$allboards{$board}};
- my $chainsini = $settings{'chainsini'};
- my $trbhostname = $settings{'FPGAboard_hostname'};
- my $addonortrb = $settings{'FPGAboard_addonortrb'};
- my $staplfilename = $settings{'FPGAboard_staplfilename'};
- my $fpga_addr = $settings{'FPGAtrbnetAddr'};
- my $conf_period_addr = $settings{'CONFperiod_trbnetAddr'};
- my $conf_offspillcounter_addr = $settings{'CONFoffspillcounter_trbnetAddr'};
- my $conf_waitstart_addr = $settings{'CONFwaitstart_trbnetAddr'};
- my $conf_triginitseq_addr = $settings{'CONFtriginitseq_trbnetAddr'};
- my $conf_trigmapsreset_addr = $settings{'CONFtrigmapsreset_trbnetAddr'};
- my $conf_trigrunjtag_addr = $settings{'CONFtrigrunjtag_trbnetAddr'};
- my $conf_trigwriteonce_addr = $settings{'CONFtrigwriteonce_trbnetAddr'};
- my $conf_trigmapsstart_addr = $settings{'CONFtrigmapsstart_trbnetAddr'};
-
- my @gui_defaults = split (/,/,$settings{'guiBM_NP_defaults'});
- $board_defaults{$board} = \@gui_defaults;
-
-
- my $vbox_board_chains = $gladexml3->get_widget('vbox_chains');
- my $vbox_board_ = $gladexml3->get_widget('vbox_chains');
-
- $chains_handlers{$board} = reload_chainsini($vbox_board_chains, $chainsini, $board);
- my %board_handlers = ('h_prog_fpga' => generate_h_prog_fpga($board, $trbhostname, $addonortrb, $staplfilename),
- 'h_start_trbnetd' => generate_h_start_trbnetd($board, $trbhostname),
- 'h_waitbeforestart_6us' => generate_h_waitbeforestart_6us($board, $fpga_addr, $conf_waitstart_addr),
- 'h_waitbeforestart_1ms' => generate_h_waitbeforestart_1ms($board, $fpga_addr, $conf_waitstart_addr),
- 'h_waitbeforestart_1s' => generate_h_waitbeforestart_1s($board, $fpga_addr, $conf_waitstart_addr),
- 'h_trigger_init_sequence' => generate_h_trig($board, $fpga_addr, $conf_triginitseq_addr),
- 'h_maps_reset' => generate_h_trig($board, $fpga_addr, $conf_trigmapsreset_addr),
- 'h_run_jtag' => generate_h_trig($board, $fpga_addr, $conf_trigrunjtag_addr),
- 'h_write_once' => generate_h_trig($board, $fpga_addr, $conf_trigwriteonce_addr),
- 'h_maps_start' => generate_h_trig($board, $fpga_addr, $conf_trigmapsstart_addr)
-
- );
- $boards_handlers{$board} = \%board_handlers;
- $board_handlers{'h_set_standard'} = generate_h_set_standard(\%boards_handlers, \%chains_handlers);
- $boards_handlers{$board} = \%board_handlers;
- $gladexml3->signal_autoconnect_all(%board_handlers);
- my $vbox_board = $gladexml3->get_widget('vbox_top');
- $vbox_board->reparent($notebook_boards);
- $notebook_boards->set_tab_label_text($vbox_board, "$board" );
- }
- $notebook_boards->show_all;
-}
-
-sub reload_chainsini {
- my ($vbox_board_chains, $chainsfile, $board) = @_;
- my %chains_handlers_hash;
- #my $window = $widget->get_parent_window;
- my @children = $vbox_board_chains->get_children;
- $vbox_board_chains->remove($children[0]);
- my $hbox_chains = Gtk2::HBox->new(FALSE, 2); # homogeneous, spacing 2
- #$hbox_chains->set_size_request(300,200);
- $vbox_board_chains->pack_start($hbox_chains, TRUE, TRUE, 0);
- $vbox_board_chains->reorder_child($hbox_chains,0);
- $vbox_board_chains->resize_children();
-
- # START from ui.pl: modified to add GUI elements and to program only when clicked in gui.
- # my $chainsfile= 'chains.ini';
- my $chainsSettings = new Config::Abstract::Ini($chainsfile);
- my %allchains = $chainsSettings->get_all_settings;
-
- my $date = strftime "%Y%m%d%H%M%S", localtime;
- my $initmem_folder = "/tmp/jtag_initmem/$date";
- if(-e $initmem_folder) {
- die("Error: Folder with the same date already exists!");
- }
- mkdir $initmem_folder,0755;
-
- # File with prefix names files for last programmed values
- my $lastprogfilename = "/tmp/jtag_initmem/lastprog.txt";
- my $handle_lastprog = FileHandle->new($lastprogfilename, 'w');
-
- # loop through chains
- foreach my $chain (reverse sort keys %allchains) {
- #GUI stuff BEGIN
- my $gladexml2 = Gtk2::GladeXML->new('gui/design/buttons_BM_NP1_libglade.glade');
- my $vbox_top = $gladexml2->get_widget('vbox_top');
- $vbox_top->reparent($hbox_chains);
- $hbox_chains->pack_start($vbox_top, TRUE, TRUE, 0); # expand, fill, padding=0
- # GUI stuff END
- reportd $chain, ": ";
- #print join ' ', %{$allchains{$chain}}, "\n";
- my %settings=%{$allchains{$chain}};
- my @sensors;
- my @drs;
- my @drs_length;
- my @old_drs;
- my @old_drs_length;
- my @irs;
- my $irlen;
- my $fpga_addr = $settings{'FPGAtrbnetAddr'};
- my $ram_addr = $settings{'RAMtrbnetAddr'};
- my $cmd_reg_addr = $settings{'CMDreg_trbnetAddr'};
- my $ram_base_addr = $settings{'RAMbase_trbnetAddr'};
- my $data_reg_addr = $settings{'DATAreg_trbnetAddr'};
- my $conf_signals_addr = $settings{'CONFsignals_trbnetAddr'};
- my $conf_resetafterfirstwrite_addr = $settings{'CONFresetafterfirstwrite_trbnetAddr'};
- my $conf_resetbeforeinit_addr = $settings{'CONFresetbeforeinit_trbnetAddr'};
- my $conf_chain_triginitseq_addr = $settings{'CONFtriginitseq_trbnetAddr'};
- my $conf_chain_trigmapsreset_addr = $settings{'CONFtrigmapsreset_trbnetAddr'};
- my $conf_chain_trigrunjtag_addr = $settings{'CONFtrigrunjtag_trbnetAddr'};
- my $conf_chain_trigwriteonce_addr = $settings{'CONFtrigwriteonce_trbnetAddr'};
- my $conf_chain_trigmapsstart_addr = $settings{'CONFtrigmapsstart_trbnetAddr'};
-
- my $chainnr = $settings{'chainnr'};
- my @gui_defaults1 = split (/,/,$settings{'guiBM_NP_defaults1'});
- my @gui_defaults2 = split (/,/,$settings{'guiBM_NP_defaults2'});
- $chain_defaults{$board}{$chain} = \@gui_defaults1;
- $chain_defaults2{$board}{$chain} = \@gui_defaults2;
- #my $staplfilename_delay1 = $settings{'FPGAboard_staplfilename_delay1'};
-
- #my $slowcontrol_hostname = $settings{'TRBNETslowcontrol_hostname'};
-
- my $memfiles_prefix; # the same prefix is used for the files for one chain
- # need one file per chip with at maximum 256 32 bit words
- # that are written at once.
- # then the RAM base pointer has to be changed for the next chip
- my @memfilenames=();
-
- $memfiles_prefix="$initmem_folder/$chain";
- foreach my $setting_name (sort keys %settings) {
- if ($setting_name =~ /sensor[0-9]+/) {
- push(@sensors, $setting_name);
- @old_drs = @drs;
- @old_drs_length = @drs_length;
- @irs = ();
- @drs = ();
- @drs_length = ();
- my $sensorfile = $settings{$setting_name};
- reportd "loading sensor file: $sensorfile\n";
- my $sensorSettingsO = new Config::Abstract::Ini("/daq/toolbox/sensors/".$sensorfile);
- my %sensorSettings = $sensorSettingsO->get_all_settings;
- my $this_irlen = $sensorSettingsO->get_entry_setting('General', 'IRLEN', '5');
- my $bypassreg = $sensorSettingsO->get_entry_setting('General', 'BYPASSREG', '1F');
- if (!defined $irlen ){
- $irlen = $this_irlen;
- }
- elsif($this_irlen != $irlen) {
- reportd "this_irlen=$this_irlen in $sensorfile differs from previously set irlen=$irlen.\nThis should be supported by this version (trb_maps_jtag3) of the JTAG controller.\n But is it really intended?\n";
- }
- #print "irlen: ", $this_irlen, "\n";
- # loop through data registers
- my %sensorData = $sensorSettingsO->get_entry('Data');
- foreach my $data_register_ir (sort keys %sensorData) {
- my $value = $sensorData{$data_register_ir};
- my ($ir,$drlength,$dr)= split(/,/, $value); # dr is stored MSN first as hexadecimal string
- $dr = uc(trim($dr));
- if(length($dr)%8 != 0) {
- die("Error: DR string is not multiple of 32 bit (4bytes = 8 nibbles)\n");
- }
- if($dr =~ /[^0-9A-F]+/) {
- die("Error: Invalid hexadecimal string for DR given: \$dr=\"$dr\"\n");
- }
- #print "drlength: $drlength\n";
- push(@drs_length, $drlength);
- push(@drs, $dr);
- push(@irs, $ir);
- # only warning
- if((defined $old_drs_length[@drs-1]) && ($drlength != $old_drs_length[@drs-1])) {
- reportd ("Warning: Length of the same DR of two sensors differs.\n");
- }
- }
- my $memfilename = $memfiles_prefix . "." . $setting_name . ".txt";
- if( -e ($memfilename)) {
- die ("Error: RAM text file \"$memfilename\" exists.");
- }
- reportd "Opening $memfilename...\n";
- my $handle = FileHandle->new($memfilename, 'w');
- push(@memfilenames, $memfilename);
- # write numregs + IRlen
- my $word = scalar($this_irlen)<<16;
- $word = $word + scalar @irs;
- ### $word = ($word<<16) + pack("L", scalar(@irs));
- print $handle "0x" . uc (substr(reverse(join('',unpack("h8", pack("L", $word)))),0,8)) . "\t# IRlen & numregs \n";
- #####print $handle "0x" .uc (substr(reverse(join('',unpack("h8", pack("L", scalar($this_irlen))))),4,4)) . uc (substr(reverse(join('',unpack("h8", pack("L", scalar(@irs))))),4,4)) . "\t# IRlen & numregs \n";
-
- #print "reverse test: " . reverse32bit(0x00000001)."\n";
- my $initial = 0x00000000;
- my $crcword = pack("L", reverse32bit($word));
- my $crc0 = crc32($crcword, $initial);
- #my $crc0_rn = ~reverse32bit($crc0);
- #printf "crc0: %0.8X, crc0_rn: %0.8X, word: %0.8X\n", $crc0, $crc0_rn, $word;
- # write DEV_ID
- $word = 0x4D323601;
- print $handle "0x" . uc (substr(reverse(join('',unpack("h8", pack("L", $word)))),0,8)) . "\t# DEV_ID \n";
- $crcword = pack("L", reverse32bit($word));
- $crc0 = crc32($crcword, $crc0);
- my $crc0_rn = ~reverse32bit($crc0);
- #printf "crc0: %0.8X, crc0_rn: %0.8X, word: %0.8X\n", $crc0, $crc0_rn, $word;
- # write pointer
- my $offset = 3*@irs+4;
- for(my $reg_i=0;$reg_i<@irs;$reg_i++) {
- my $drlen = $drs_length[$reg_i];
- $word = $offset;
- #print $handle "0x". uc (substr(reverse(join('',unpack("h8", pack("L", 0)))),4,4)) . uc (substr(reverse(join('',unpack("h8", pack("L", scalar($offset))))),4,4)) . "\t# Pointer + reserved\n";
- $crcword = pack("L", reverse32bit($word));
- $crc0 = crc32($crcword, $crc0);
- print $handle "0x" . uc (substr(reverse(join('',unpack("h8", pack("L", $word)))),0,8)) . "\t# Pointer + reserved \n";
- $word = $drlen;
- $crcword = pack("L", reverse32bit($word));
- $crc0 = crc32($crcword, $crc0);
-
- #print $handle "0x0000". uc (substr(reverse(join('',unpack("h8", pack("L", scalar($drlen))))),4,4)) . "\t# Length\n";
- print $handle "0x" . uc (substr(reverse(join('',unpack("h8",pack("L", $word)))),0,8)) . "\t# Length\n";
- $offset += floor(($drlen+31)/32);
- }
- # write CRC-32
- #my $ir_packed_r = pack("B*", scalar reverse substr(unpack("B*", pack("H*", $ir.("0"x (7-(length($ir)-1)%8)))),0, 32));
- $crc0_rn = ~reverse32bit($crc0);
- #printf "CRC: %0.8X.\n", $crc0_rn, 1;
- my $line_crc = sprintf "%0.8X", $crc0_rn;
- print $handle "0x". substr($line_crc,length($line_crc)-8,8) . "\t# CRC-32\n";
-
- my $crc1 = 0xFFFFFFFF;
- # write IRs
- for(my $reg_i=0;$reg_i<@irs;$reg_i++) {
- my $ir = $irs[$reg_i];
- #my @words = unpack("L", pack("H*", uc($ir)));
- $word = unpack("L", pack("h*", (scalar reverse uc($ir)) ."000000"));
- #print "ir=$ir.IR word: $word\n";
- $crcword = pack("L", reverse32bit($word));
- $crc1 = crc32($crcword, $crc1);
- print $handle "0x".("0"x(8-length($ir))).uc($ir) . "\t# IR\n";
- }
- # write BYPASSREG IR
- $word = unpack("L", pack("h*", (scalar reverse uc($bypassreg)) ."000000"));
- $crcword = pack("L", reverse32bit($word));
- $crc1 = crc32($crcword, $crc1);
- print $handle "0x".("0"x(8-length($bypassreg))).uc($bypassreg) . "\t# IR BYPASS\n";
-
- # write DRs
- for(my $reg_i=0;$reg_i<@irs;$reg_i++) {
- my $length = $drs_length[$reg_i];
- my $numwords = floor(($length+31)/32);
- for(my $i=0;$i<$numwords; $i++) {
- #print "length: $length\n";
- #print "numwords: $numwords\n";
-
- $word = unpack("L", pack("h*", (scalar reverse uc(substr($drs[$reg_i],($numwords-$i-1)*8,8)))));
- $crcword = pack("L", reverse32bit($word));
- $crc1 = crc32($crcword, $crc1);
- my $linestr = "0x". substr($drs[$reg_i],($numwords-$i-1)*8,8) . "\t# DR" . $reg_i . "\n";
- print $handle $linestr;
- }
- }
- #write CRC-32
- my $crc1_rn = ~reverse32bit($crc1);
- $line_crc = sprintf "%0.8X", $crc1_rn;
- print $handle "0x". substr($line_crc,length($line_crc)-8,8) . "\t# CRC-32\n";
-
- }
- }
- my $ref_h_prog_ram = generate_h_prog_ram($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $ram_base_addr, $ram_addr, scalar @sensors, \@memfilenames);
- my %handlers_hash = ('h_man_maps_reset'=>generate_h_man_maps_reset($chain, $fpga_addr, $conf_signals_addr),
- #'h_prog_fpga_delay1' => generate_h_prog_fpga($chain, $trbhostname, $addonortrb, $staplfilename_delay1),
- 'h_delay0' => generate_h_delay ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, 0),
- 'h_delay1' => generate_h_delay ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, 1),
- 'h_delay2' => generate_h_delay ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, 2),
- 'h_delay3' => generate_h_delay ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, 3),
- 'h_prog_ram' => $ref_h_prog_ram,
- 'h_set_timing_10mhz' => generate_h_set_timing_10mhz($chain, $fpga_addr,$cmd_reg_addr, $data_reg_addr),
- 'h_set_timing_1mhz' => generate_h_set_timing_1mhz($chain, $fpga_addr,$cmd_reg_addr, $data_reg_addr),
- 'h_set_timing_100khz' => generate_h_set_timing_100khz($chain, $fpga_addr,$cmd_reg_addr, $data_reg_addr),
- #'h_start' => generate_h_start($chain, $fpga_addr,$cmd_reg_addr),
- #'h_stop' => generate_h_stop($chain, $fpga_addr,$cmd_reg_addr),
- 'h_set_inout' => generate_h_set_inout($chain, $fpga_addr, $conf_signals_addr),
- 'h_maps_reset_before_on' => generate_h_maps_reset(1,$chain, $chainnr, $fpga_addr, $conf_resetbeforeinit_addr),
- 'h_maps_reset_before_off' => generate_h_maps_reset(0,$chain, $chainnr, $fpga_addr, $conf_resetbeforeinit_addr),
- 'h_maps_reset_after_on' => generate_h_maps_reset(1,$chain, $chainnr, $fpga_addr, $conf_resetafterfirstwrite_addr),
- 'h_maps_reset_after_off' => generate_h_maps_reset(0,$chain, $chainnr, $fpga_addr, $conf_resetafterfirstwrite_addr),
- #'h_maps_start_on' => generate_h_maps_start(1,$chain, $fpga_addr, $conf_signals_addr),
- #'h_maps_start_off' => generate_h_maps_start(0,$chain, $fpga_addr, $conf_signals_addr),
- 'h_maps_clk_on' => generate_h_maps_clk_signal(1,$chain, $fpga_addr, $conf_signals_addr),
- 'h_maps_clk_off' => generate_h_maps_clk_signal(0,$chain, $fpga_addr, $conf_signals_addr),
- 'h_trig_init_seq' => generate_h_chain_trig($chain, $chainnr, $fpga_addr, $conf_chain_triginitseq_addr),
- 'h_maps_reset' => generate_h_chain_trig($chain, $chainnr, $fpga_addr, $conf_chain_trigmapsreset_addr),
- 'h_run_jtag' => generate_h_chain_trig($chain, $chainnr, $fpga_addr, $conf_chain_trigrunjtag_addr),
- 'h_write_once' => generate_h_chain_trig($chain, $chainnr, $fpga_addr, $conf_chain_trigwriteonce_addr),
- 'h_maps_start' => generate_h_chain_trig($chain, $chainnr, $fpga_addr, $conf_chain_trigmapsstart_addr)
- );
- $gladexml2->signal_autoconnect_all(%handlers_hash);
- my $label_chainnr = $gladexml2->get_widget('label_chainnr');
- $label_chainnr->set_label($chain);
- $chains_handlers_hash{$chain} = \%handlers_hash;
- reportd "\n";
- }
- print $handle_lastprog $initmem_folder;
-
- $hbox_chains->show_all;
- return \%chains_handlers_hash;
-
-}
-
-
-# Boris
-sub exitclean{
- Gtk2->main_quit();
- exit (0);
-}
-
-
-
-
-$gladexml->signal_autoconnect_from_package('main');
-#$gladexml->signal_autoconnect_all ('h_reload_chainsini'=>\&h_reload_chainsini);
-#$quitbtn = $gladexml->get_widget('Quit');
-my $window1 = $gladexml->get_widget('window1');
-$window1->signal_connect(destroy => \&exitclean); #Boris
-$window1->show_all;
-Gtk2->main;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# #print "data registers for FPGA $fpga_addr:", map { "$_ => $drs_binary{$_}\n" } keys %drs_binary;
-# $drs_offset{$irs[0]} = 4+(scalar @irs)*2;
-# for (my $i=1;$i<@irs;$i++) {
-# my $dr_length = $drs_length{$irs[$i-1]};
-# $drs_offset{$irs[$i]} = $drs_offset{$irs[$i-1]} + floor(($dr_length*(scalar @sensors)+31)/32) + 2; # add one x 32 bit for CRC, one x 32 bit for IR, integer division rounds down, right?
-# }
-# #open RAMTEXT, ">$memfiles_prefix{$chain}";
-# $num_words = 0;
-# my $ram_fh;
-# my @mem_filenames;
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".uc (reverse(join('',unpack("h8", pack("L", scalar(@sensors)))))) . "\t# numchips \n"); # numchips; the reverse is done here because apparently internally the unsigned long is stored LSByte first (little endian)
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".uc(reverse(join('',unpack("h8", pack("L", 0))))) . "\t# reserved\n"); # reserved
-# for (my $i=0;$i<@irs;$i++) {
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".uc(reverse(join('',unpack("h8", pack("L", $drs_offset{$irs[$i]}))))) . "\t# pointer\n"); # pointer
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".uc(reverse(join('',unpack("h8", pack("L", $drs_length{$irs[$i]}))))) . "\t# length \n"); # length
-# }
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x00000000\t# pointer (end of list)\n");
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x00000000\t# length (end of list)\n");
-# for (my $i=0;$i<@irs;$i++) {
-# my $ir=$irs[$i];
-# #print "ir: $ir\n";
-# my $ir_packed = pack("h*", (scalar reverse($ir)).("0"x (7-(length($ir)-1)%8)));
-# my $ir_packed_r = pack("B*", scalar reverse substr(unpack("B*", pack("H*", $ir.("0"x (7-(length($ir)-1)%8)))),0, 32));
-# #print "debug ir_packed (h*): ". (scalar reverse($ir)).("0"x (8-length($ir)%32))."\n";
-# #print "debug ir_packed_r (B*): ". scalar reverse unpack("B*", pack("H*", $ir.("0"x (7-(length($ir)-1)%8)))) ."\n";
-# #print "debug2: " . (7-(length($ir)-1)%8) . "\n";
-# #print "debug3: " . $ir . "\n";
-# #print "debug4: " . $ir.("0"x (7-(length($ir)-1)%8)) . "\n";
-# #print "debug5 (B*): ". unpack("B*", pack("H*", $ir.("0"x (7-(length($ir)-1)%8)))) ."\n";
-#
-# my $initial = 0x00000000;
-# my $crc0 = crc32($ir_packed_r, $initial);
-# #printf "CRC0: %X. ~reversed: %X\n", $crc0, $crc0_rn;
-#
-# for(my $i=0; $i<floor((length($drs_binary{$ir})-1)/32)+1;$i++){
-# my $dr_word_packed_r = pack("b*", scalar reverse substr($drs_binary{$ir}.("0"x (31-(length($drs_binary{$ir})-1)%32)),($i)*32, 32));
-# $crc0 = crc32($dr_word_packed_r, $crc0);
-# my $crc0_rn = ~reverse32bit($crc0);
-# printf "CRC: 0x%0.8X.\n", $crc0_rn;
-# }
-# my $crc0_rn = ~reverse32bit($crc0);
-# #printf "CRC: %0.8X.\n", $crc0_rn, 1;
-# my $line_crc = sprintf "0x%0.8X\t# CRC-32\n", $crc0_rn;
-# print "debug dr_binary: " . $drs_binary{$ir} . "\n";
-# my $dr_packed = pack("b*", $drs_binary{$ir}.("0"x (31-(length($drs_binary{$ir})-1)%32)));
-# $drs{$ir} = unpack('h*', $dr_packed);
-# print "debug drs: " . $drs{$ir} . "\n";
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".("0"x(8-length($ir))).uc($ir) . "\n");
-# for(my $i=0; $i<floor((length( $drs{$ir}) -1)/8)+1; $i++){
-# #print "dbg: i=$i, len=".length( $drs{$ir})."\n";
-# if(length($drs{$ir}) >= ($i+1)*8) {
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".uc(reverse(substr($drs{$ir}, ($i)*8, 8))) . "\n");
-# }
-# else {
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, "0x".("0"x(($i+1)*8-length($drs{$ir}))).uc(reverse(substr($drs{$ir}, ($i)*8, length($drs{$ir})%8))) . "\n");
-# }
-# }
-# memfile_writeline( $ram_fh, \@mem_filenames, $memfiles_prefix, $line_crc);
-#
-# #print "IR $ir, DR ". $drs{$ir} . "\n";
-# }
-# #close RAMTEXT;
-# $ram_fh->close();
-# #my $result = `cat $memfile{$fpga_addr}`;
-# $ENV{'DAQOPSERVER'}="trb126";
-# for(my $i=0;$i<scalar @mem_filenames;$i++) {
-# # write RAM base pointer
-# my $ihex = int_to_32bit_hex($i);
-# print "trbcmd w $fpga_addr $ram_base_addr 0x$ihex\n";
-# my $result = `trbcmd w $fpga_addr $ram_base_addr 0x$ihex\n`;
-# print "set RAM base pointer: " . $result;
-# # write to configuration RAM
-# print "trbcmd wm $fpga_addr $ram_addr 0 $mem_filenames[$i]\n";
-# $result = `trbcmd wm $fpga_addr $ram_addr 0 $mem_filenames[$i]`;
-# print "write max. 256 32-bit-words: " . $result;
-# }
-#}
-
-
-# init_writemem:
-# - loop through chains
-# - loop through sensors
-# - test if IR length is the same as for other sensors
-# - loop through DRs
-# - test if DR length is the same as for other sensors
-# - add DR content to chain data register (hexadecimal string)
-# - write contents for JTAG chain controller RAM to text file(s)
-# - execute trbcmd to transfer file(s) to RAM of FPGA configured in chains.ini
-#
-# get_status:
-# get_error_counts:
-# reactivate_sensor:
-# deactivate_sensor:
jspc29 / jtag_mvd.git / commitdiff