ADC: Switching to other CLK also does not help...

diff --git a/ADC/trb3_periph_adc.vhd b/ADC/trb3_periph_adc.vhd
index dfadae846b13d966286efda8a58ddf3fe0135d5d..d7c48cb8be25fd4c50c1285ff6150210727c88c9 100644 (file)
--- a/ADC/trb3_periph_adc.vhd
+++ b/ADC/trb3_periph_adc.vhd
@@ -241,7 +241,7 @@ begin
 ---------------------------------------------------------------------------
   THE_MAIN_PLL : pll_in200_out100
     port map(
-      CLK   => CLK_PCLK_LEFT,
+      CLK   => CLK_GPLL_RIGHT,
       CLKOP => clk_100_i,
       CLKOK => clk_200_i,
       LOCK  => pll_lock