]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
*** empty log message ***
authorhadeshyp <hadeshyp>
Tue, 8 May 2012 20:16:02 +0000 (20:16 +0000)
committerhadeshyp <hadeshyp>
Tue, 8 May 2012 20:16:02 +0000 (20:16 +0000)
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ipx
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.lpc
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_bb.v
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_beh.v
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_filelist.log
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_generate.log
gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34_inst.v

index 74309ad1540a8902528a5457270c1b671d4ca2fc..cada8be044757911f40d3795d5f5210f6f452f7a 100644 (file)
@@ -1,10 +1,10 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<DiamondModule name="sgmii_gbe_pcs34" module="SGMII/Gb Ethernet PCS" VendorName="Lattice Semiconductor Corporation" generator="IPexpress" date="2011 06 17 11:36:56.461" version="3.4" type="IP" synthesis="synplify" source_format="VHDL">
+<DiamondModule name="sgmii_gbe_pcs34" module="SGMII/Gb Ethernet PCS" VendorName="Lattice Semiconductor Corporation" generator="IPexpress" date="2011 10 04 13:50:40.319" version="3.4" type="IP" synthesis="synplify" source_format="VHDL">
   <Package>
-               <File name="sgmii_gbe_pcs34.lpc" type="lpc" modified="2011 06 17 11:36:40.000"/>
-               <File name="sgmii_gbe_pcs34.ngo" type="database" modified="2011 06 17 11:36:53.000"/>
-               <File name="sgmii_gbe_pcs34_bb.v" type="black_box_verilog" modified="2011 06 17 11:36:53.000"/>
-               <File name="sgmii_gbe_pcs34_beh.v" type="behavioral_verilog" modified="2011 06 17 11:36:53.000"/>
-               <File name="sgmii_gbe_pcs34_inst.v" type="instantiation_verilog" modified="2011 06 17 11:36:53.000"/>
+               <File name="sgmii_gbe_pcs34.lpc" type="lpc" modified="2011 10 04 13:50:08.000"/>
+               <File name="sgmii_gbe_pcs34.ngo" type="database" modified="2011 10 04 13:50:20.000"/>
+               <File name="sgmii_gbe_pcs34_bb.v" type="black_box_verilog" modified="2011 10 04 13:50:20.000"/>
+               <File name="sgmii_gbe_pcs34_beh.v" type="behavioral_verilog" modified="2011 10 04 13:50:20.000"/>
+               <File name="sgmii_gbe_pcs34_inst.v" type="instantiation_verilog" modified="2011 10 04 13:50:20.000"/>
   </Package>
 </DiamondModule>
index 85bccebd0ec1bbf221458f2722cf764cb3004d92..78e9a7a6acec041679ed74471087b2b3c004fe82 100644 (file)
@@ -1,9 +1,9 @@
 [Device]
-Family=ep5m00
-PartType=LFE2M100E
-PartName=LFE2M100E-5F900C
-SpeedGrade=5
-Package=FPBGA900
+Family=ep5c00
+PartType=LFE3-150EA
+PartName=LFE3-150EA-8FN1156C
+SpeedGrade=8
+Package=FPBGA1156
 OperatingCondition=COM
 Status=P
 
@@ -16,8 +16,8 @@ CoreRevision=3.4
 ModuleName=sgmii_gbe_pcs34
 SourceFormat=VHDL
 ParameterFileVersion=1.0
-Date=06/17/2011
-Time=11:36:40
+Date=10/04/2011
+Time=13:50:08
 
 [Parameters]
 RX_CTC=2
index 0038491ac0595b1d6ba871dcb25ad3f3135a1774..0b24d2558683d8840971e6923e6fcce756742a4e 100644 (file)
Binary files a/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo and b/gbe2_ecp3/ipcores_ecp3/sgmii_gbe_pcs34/sgmii_gbe_pcs34.ngo differ
index 059cdada6adfb23232426a1be0e9283877a03db0..5b49cc1e465005b4ae4f766471dde4277c262512 100644 (file)
@@ -1,5 +1,5 @@
 //=============================================================================
-// Verilog module generated by IPExpress    06/17/2011    11:36:53          
+// Verilog module generated by IPExpress    10/04/2011    13:50:20          
 // Filename: sgmii_gbe_pcs34_bb.v                                            
 // Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved.   
 //=============================================================================
index 6a960dab9b110257a4c56ae57a4250f22355a4d1..e3a0f0210e918f8276a3a266f9c41fb2dc36a137 100644 (file)
@@ -10,7 +10,7 @@
 
 `define SGMII_YES_CTC_DYNAMIC\r
 
-`define SGMII_FIFO_FAMILY_ECP2M\r
+`define SGMII_FIFO_FAMILY_ECP3\r
 
 `define SGMII_YES_SINGLE_CLOCK\r
 
index 842767fab2837c804c2d6aea7f41fcdc2099fa45..88e4e39d5c2ad43be282734022cdcb4954923747 100644 (file)
@@ -1,12 +1,12 @@
 =============================================================================
-Filelist generated by IPexpress    06/17/2011    11:36:53          
+Filelist generated by IPexpress    10/04/2011    13:50:21          
 Filename: sgmii_gbe_pcs34_filelist.log                                         
 Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved.   
 =============================================================================
 
 -----------------------------------------------------------------------------
 Basic IP Core Files
-Output Directory: /home/greg/projects/trbnet/gbe2_ecp2m/ipcores/sgmii_gbe_pcs34 
+Output Directory: /home/greg/projects/trb3/trb3_gbe/ipcores 
 -----------------------------------------------------------------------------
   sgmii_gbe_pcs34.lpc
       : IP ispLEVER LPC File
@@ -32,7 +32,7 @@ Supplemental Evaluation Files:
 ---------------------------------:
  
     Hardware Specific Models
-    ../sgmii_pcs_eval/models/ecp2m/pcs_serdes 
+    ../sgmii_pcs_eval/models/ecp3/pcs_serdes 
  
     Testbench
     ../sgmii_pcs_eval/testbench
@@ -42,7 +42,7 @@ Supplemental Evaluation Files:
 ------------------------------------------------
  
     Source Files
-    ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp2m
+    ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp3
  
     Simulation
     ../sgmii_pcs_eval/sgmii_gbe_pcs34/sim/modelsim
index e6740a3cf8f464aadab2a6c020288757c29849b5..15d49674b41eb9eec891b3fe43b19e37947d48d8 100644 (file)
@@ -1,30 +1,30 @@
 Starting process: IPCFG
 
 GenerateCore within package Core_Generate 1.0.0 in file LatticeIP_generate.tcl
-Starting process: '"/opt/lattice/diamond/1.1/bin/lin/synpwrap" -rem -e sgmii_gbe_pcs34 -target lattice-ecp2m'
+Starting process: '"/opt/lattice/diamond/1.3/bin/lin/synpwrap" -rem -e sgmii_gbe_pcs34 -target lattice-ecp3'
 
 Warning: You are running on an unsupported platform 
 End process: completed successfully.
 
-Starting process: '"/opt/lattice/diamond/1.1/bin/lin/../../ispfpga/bin/lin/edif2ngd" -ip "/home/greg/sgmii_gbepcs_v3.4/lib/../.." -ic sgmii_gbepcs_v3.4 -l LatticeECP2M-DSP -nopropwarn "syn_results/sgmii_gbe_pcs34.edi" "sgmii_gbe_pcs34.ngo"'
-edif2ngd:  version Diamond_1.1_Production (517)
+Starting process: '"/opt/lattice/diamond/1.3/bin/lin/../../ispfpga/bin/lin/edif2ngd" -ip "/home/greg/sgmii_gbepcs_v3.4/lib/../.." -ic sgmii_gbepcs_v3.4 -l LatticeECP3 -nopropwarn "syn_results/sgmii_gbe_pcs34.edi" "sgmii_gbe_pcs34.ngo"'
+edif2ngd:  version Diamond_1.3_Production (92)
 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
      Copyright (c) 1995 AT&T Corp.   All rights reserved.
      Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
      Copyright (c) 2001 Agere Systems   All rights reserved.
-     Copyright (c) 2002-2010 Lattice Semiconductor Corporation,  All rights reserved.
+     Copyright (c) 2002-2011 Lattice Semiconductor Corporation,  All rights reserved.
 No device specified. Will use default.
 Writing the design to sgmii_gbe_pcs34.ngo...
 End process: completed successfully.
 
 =============================================================================
-Filelist generated by IPexpress    06/17/2011    11:36:53          
+Filelist generated by IPexpress    10/04/2011    13:50:21          
 Filename: sgmii_gbe_pcs34_filelist.log                                         
 Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved.   
 =============================================================================
 -----------------------------------------------------------------------------
 Basic IP Core Files
-Output Directory: /home/greg/projects/trbnet/gbe2_ecp2m/ipcores/sgmii_gbe_pcs34 
+Output Directory: /home/greg/projects/trb3/trb3_gbe/ipcores 
 -----------------------------------------------------------------------------
   sgmii_gbe_pcs34.lpc
       : IP ispLEVER LPC File
@@ -49,7 +49,7 @@ Supplemental Evaluation Files:
 ---------------------------------:
 
     Hardware Specific Models
-    ../sgmii_pcs_eval/models/ecp2m/pcs_serdes 
+    ../sgmii_pcs_eval/models/ecp3/pcs_serdes 
 
     Testbench
     ../sgmii_pcs_eval/testbench
@@ -59,7 +59,7 @@ Supplemental Evaluation Files:
 ------------------------------------------------
 
     Source Files
-    ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp2m
+    ../sgmii_pcs_eval/sgmii_gbe_pcs34/src/rtl/ecp3
 
     Simulation
     ../sgmii_pcs_eval/sgmii_gbe_pcs34/sim/modelsim
index 7cc495e25ab9915108278944d2de042e696fc555..09b79547523af6b62ae11e599caa68d83a6da072 100644 (file)
@@ -1,5 +1,5 @@
 //=============================================================================
-// Verilog module generated by IPExpress    06/17/2011    11:36:53          
+// Verilog module generated by IPExpress    10/04/2011    13:50:20          
 // Filename: sgmii_gbe_pcs34_inst.v                                            
 // Copyright(c) 2008 Lattice Semiconductor Corporation. All rights reserved.   
 //=============================================================================