]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
some more cleanup
authorJan Michel <j.michel@gsi.de>
Mon, 22 Jan 2018 13:55:17 +0000 (14:55 +0100)
committerJan Michel <j.michel@gsi.de>
Fri, 2 Feb 2018 11:06:18 +0000 (12:06 +0100)
special/spi_flash_and_fpga_reload_record.vhd
trb_net_components.vhd

index b37310d103b7f9d2452a25a658b581557aef2388..7243d4bc6dde49f2fabab258df6cd7784d6e7996 100644 (file)
@@ -77,30 +77,30 @@ THE_BUS_HANDLER : trb_net16_regio_bus_handler
     DAT_UNKNOWN_ADDR_OUT  => BUS_TX.unknown,
 
   --Bus Handler (SPI CTRL)
+  --Bus Handler (SPI Memory)
     BUS_READ_ENABLE_OUT(0)              => spictrl_read_en,
+    BUS_READ_ENABLE_OUT(1)              => spimem_read_en,
     BUS_WRITE_ENABLE_OUT(0)             => spictrl_write_en,
+    BUS_WRITE_ENABLE_OUT(1)             => spimem_write_en,
     BUS_DATA_OUT(0*32+31 downto 0*32)   => spictrl_data_in,
+    BUS_DATA_OUT(1*32+31 downto 1*32)   => spimem_data_in,
     BUS_ADDR_OUT(0*16)                  => spictrl_addr,
     BUS_ADDR_OUT(0*16+15 downto 0*16+1) => open,
-    BUS_TIMEOUT_OUT(0)                  => open,
-    BUS_DATA_IN(0*32+31 downto 0*32)    => spictrl_data_out,
-    BUS_DATAREADY_IN(0)                 => spictrl_ack,
-    BUS_WRITE_ACK_IN(0)                 => spictrl_ack,
-    BUS_NO_MORE_DATA_IN(0)              => spictrl_busy,
-    BUS_UNKNOWN_ADDR_IN(0)              => '0',
-    
-  --Bus Handler (SPI Memory)
-    BUS_READ_ENABLE_OUT(1)              => spimem_read_en,
-    BUS_WRITE_ENABLE_OUT(1)             => spimem_write_en,
-    BUS_DATA_OUT(1*32+31 downto 1*32)   => spimem_data_in,
     BUS_ADDR_OUT(1*16+5 downto 1*16)    => spimem_addr,
     BUS_ADDR_OUT(1*16+15 downto 1*16+6) => open,
+    BUS_TIMEOUT_OUT(0)                  => open,
     BUS_TIMEOUT_OUT(1)                  => open,
+    BUS_DATA_IN(0*32+31 downto 0*32)    => spictrl_data_out,
     BUS_DATA_IN(1*32+31 downto 1*32)    => spimem_data_out,
+    BUS_DATAREADY_IN(0)                 => spictrl_ack,
     BUS_DATAREADY_IN(1)                 => spimem_ack,
+    BUS_WRITE_ACK_IN(0)                 => spictrl_ack,
     BUS_WRITE_ACK_IN(1)                 => spimem_ack,
+    BUS_NO_MORE_DATA_IN(0)              => spictrl_busy,
     BUS_NO_MORE_DATA_IN(1)              => '0',
+    BUS_UNKNOWN_ADDR_IN(0)              => '0',
     BUS_UNKNOWN_ADDR_IN(1)              => '0',
+    
     STAT_DEBUG => open
     );
 
@@ -164,4 +164,4 @@ THE_FPGA_REBOOT : fpga_reboot
     );
 
     
-end architecture;
\ No newline at end of file
+end architecture;
index 8a15e203a22663b9d2ce4aaa189497de0ae9cc4c..8a3cc3856cc31fdba2cce6f3d5af0e95e9fc8bf1 100644 (file)
@@ -3078,8 +3078,8 @@ end component;
 \r
   component spi_ltc2600 is\r
     generic (\r
-      BITS       : integer range 8 to 32;\r
-      WAITCYCLES : integer range 2 to 1024);\r
+      BITS       : integer range 8 to 32 := 32;\r
+      WAITCYCLES : integer range 2 to 1024 := 7);\r
     port (\r
       CLK_IN       : in  std_logic;\r
       RESET_IN     : in  std_logic;\r