few bugfixes to USB sctrl

diff --git a/pulser/lcd_config.vhd b/pulser/lcd_config.vhd
index d7fcb0238fe14c4b74854a943c82bc40049b2a7f..2fa1b806803e861bc3345755071ae484d13a5a82 100644 (file)
--- a/pulser/lcd_config.vhd
+++ b/pulser/lcd_config.vhd
@@ -7,7 +7,7 @@ package lcd_config is
 
 
   type data_t is array (0 to 1023) of std_logic_vector(7 downto 0);
-  constant dataram : data_t := (
+  constant dataram_pack : data_t := (
       x"36",x"48",x"3A",x"55",x"29",x"2A",x"00",x"00",
       x"00",x"EF",x"2B",x"00",x"00",x"01",x"3F",x"2C",
       x"00",x"00",x"00",x"00",x"00",x"00",x"00",x"00",

diff --git a/pulser/padiwa_pulser.vhd b/pulser/padiwa_pulser.vhd
index d53a57e64d316561ac2bc8ffc2912e5686c6c592..4c4b8dd1768e94b6b2fe5fdf5097366f39db6cbf 100644 (file)
--- a/pulser/padiwa_pulser.vhd
+++ b/pulser/padiwa_pulser.vhd
@@ -80,7 +80,7 @@ THE_PLL : entity work.pll
 ---------------------------------------------------------------------------
 THE_UART : entity work.uart_sctrl
   port map(
-    CLK     => clk_i,
+    CLK     => clk_osc,
     RESET   => '0',
     UART_RX => SPARE_LINE(0),
     UART_TX => SPARE_LINE(2),
@@ -97,7 +97,7 @@ THE_UART : entity work.uart_sctrl
 
 
 PROC_REGISTERS : process begin
-  wait until rising_edge(clk_i);
+  wait until rising_edge(clk_osc);
   if bus_write= '1' then
     if uart_addr = x"01" then
       lcd_data_i(31 downto 0) <= uart_rx_data;

diff --git a/source/lcd.vhd b/source/lcd.vhd
index 8384d5f3a9a6d14fb7cd18c9cc7f6b633e8bb443..71f2c39f03c4d590b76f8a9d0c75eff535f95370 100644 (file)
--- a/source/lcd.vhd
+++ b/source/lcd.vhd
@@ -157,6 +157,8 @@ constant fontram : fontram_t := (
   type initdc_t   is array (0 to 15) of std_logic;\r
   constant initdc   : initdc_t   := ('0','1','0','1','0','0','1','1','1','1','0','1','1','1','1','0');\r
 \r
+  constant dataram: data_t := dataram_pack;\r
+\r
   signal timer : unsigned(27 downto 0) := (others => '0');\r
   --2**16: 2.5ms\r
   --2**20: 40ms\r