added checker for ADC words

diff --git a/ADC/compile_periph_frankfurt.pl b/ADC/compile_periph_frankfurt.pl
index cc768330a98a3af8647db73633186500da72131b..37970429e4ca77450c1c9a38c463daab4af27ac6 100755 (executable)
--- a/ADC/compile_periph_frankfurt.pl
+++ b/ADC/compile_periph_frankfurt.pl
@@ -55,7 +55,7 @@ system("rm $TOPNAME.ncd");
 
 #$c=qq|mpartrce -p "../$TOPNAME.p2t" -log "$TOPNAME.log" -o "$TOPNAME.rpt" -pr "$TOPNAME.prf" -tf "$TOPNAME.pt" "|.$TOPNAME.qq|_map.ncd" "$TOPNAME.ncd"|;
 #  $c=qq|$lattice_path/ispfpga/bin/lin/multipar -pr "$TOPNAME.prf" -o "mpar_$TOPNAME.rpt" -log "mpar_$TOPNAME.log" -p "../$TOPNAME.p2t"  "$tpmap.ncd" "$TOPNAME.ncd"|;
-$c=qq|$lattice_path/ispfpga/bin/lin/par -w -l 5 -i 6 -t 3 -c 0 -e 0 -exp parUseNBR=1:parCDP=0:parCDR=0:parPathBased=OFF $tpmap.ncd $TOPNAME.ncd $TOPNAME.prf|;
+$c=qq|$lattice_path/ispfpga/bin/lin/par -w -l 5 -i 6 -t 4 -c 0 -e 0 -exp parUseNBR=1:parCDP=0:parCDR=0:parPathBased=OFF $tpmap.ncd $TOPNAME.ncd $TOPNAME.prf|;
 execute($c);
 
 $c=qq|$lattice_path/ispfpga/bin/lin/ltxt2ptxt $TOPNAME.ncd|;

diff --git a/ADC/source/adc_handler.vhd b/ADC/source/adc_handler.vhd
index 2d42523b0c4656eb7f5816c0e7579fb6ce44bd31..2e753ed7f0821a26f2f283a7dcee9f34c8911063 100644 (file)
--- a/ADC/source/adc_handler.vhd
+++ b/ADC/source/adc_handler.vhd
@@ -242,6 +242,8 @@ PROC_BUS : process begin
         when x"16" =>  BUS_TX.data( 3 downto 0) <= std_logic_vector(config.averaging);
         when x"17" =>  BUS_TX.data(31 downto 0) <=  config.trigger_enable(31 downto  0);
         when x"18" =>  BUS_TX.data(15 downto 0) <=  config.trigger_enable(47 downto 32);
+        when x"19" =>  BUS_TX.data(RESOLUTION-1 downto 0)     <= config.check_word1;
+                       BUS_TX.data(RESOLUTION-1+16 downto 16) <= config.check_word2;
         when others => BUS_TX.ack <= '0'; BUS_TX.unknown <= '1';
       end case;
     elsif BUS_RX.addr >= x"0020" and BUS_RX.addr <= x"002f" then      
@@ -256,7 +258,6 @@ PROC_BUS : process begin
     elsif BUS_RX.addr >= x"0030" and BUS_RX.addr <= x"003b" then      
       BUS_TX.ack  <= '1';
       BUS_TX.data <= adc_debug(to_integer(unsigned(BUS_RX.addr(3 downto 0)))*32+31 downto to_integer(unsigned(BUS_RX.addr(3 downto 0)))*32);
-      
     elsif BUS_RX.addr >= x"0800" and BUS_RX.addr <= x"08bf" and BUS_RX.addr(5 downto 0) < std_logic_vector(to_unsigned(DEVICES*CHANNELS,6)) then
       buffer_device <= to_integer(unsigned(BUS_RX.addr(5 downto 2)));
       buffer_addr   <= '0' & BUS_RX.addr(7 downto 6) & BUS_RX.addr(1 downto 0);
@@ -288,6 +289,8 @@ PROC_BUS : process begin
         when x"16" =>   config.averaging          <= unsigned(BUS_RX.data( 3 downto 0));
         when x"17" =>   config.trigger_enable(31 downto  0) <= BUS_RX.data(31 downto 0);
         when x"18" =>   config.trigger_enable(47 downto 32) <= BUS_RX.data(15 downto 0);
+        when x"19" =>   config.check_word1        <= BUS_RX.data(RESOLUTION-1 downto 0);
+                        config.check_word2        <= BUS_RX.data(RESOLUTION-1+16 downto 16);
         when others => BUS_TX.ack <= '0'; BUS_TX.unknown <= '1';        
       end case;
     elsif BUS_RX.addr >= x"0020" and BUS_RX.addr <= x"002f" then      

diff --git a/ADC/source/adc_package.vhd b/ADC/source/adc_package.vhd
index bd97b17b8bb6411b86f060571e4e6c0552fa7978..bede861c693c7dce2914b5c4bf6c0506dc461f95 100644 (file)
--- a/ADC/source/adc_package.vhd
+++ b/ADC/source/adc_package.vhd
@@ -38,6 +38,8 @@ type cfg_t is record
   block_avg         : unsigned_array_8(0 to 3);
   block_sums        : unsigned_array_8(0 to 3);
   block_scale       : unsigned_array_8(0 to 3);
+  check_word1       : std_logic_vector(RESOLUTION-1 downto 0);
+  check_word2       : std_logic_vector(RESOLUTION-1 downto 0);
 end record;
 
 end package;

diff --git a/ADC/source/adc_processor.vhd b/ADC/source/adc_processor.vhd
index ce1a4e38e4fab6f9b08e86c5149f9e0a107b627d..948952d3e0bfaf213e9e468c865893f24a36d68f 100644 (file)
--- a/ADC/source/adc_processor.vhd
+++ b/ADC/source/adc_processor.vhd
@@ -40,7 +40,7 @@ attribute syn_ramstyle : string;
 attribute syn_keep     : boolean;
 attribute syn_preserve : boolean;
 
-attribute syn_hier of adc_processor_arch : architecture is "flatten, firm";
+attribute syn_hier of adc_processor_arch : architecture is "hard";
 
 type ram_t          is array (0 to 1023)       of unsigned(17 downto 0);
 type ram_arr_t      is array (0 to 3)          of ram_t;
@@ -110,6 +110,8 @@ signal prepare_header, last_prepare_header, prepare_header_valid : std_logic :=
 signal blockcurrent, last_blockcurrent                           : integer range 0 to 3 := 0;
 signal myavg : unsigned(7 downto 0);
 
+signal invalid_word_count : arr_CHAN_RES_t := (others => (others => '0'));
+
 -- 800 - 83f last ADC values              (local 0x0 - 0x3)
 -- 840 - 87f long-term average / baseline (local 0x4 - 0x7)
 -- 880 - 8bf fifo access (debugging only) (local 0x8 - 0xb)
@@ -138,7 +140,7 @@ begin
         when "10" => DEBUG_BUFFER_DATA(17 downto 0)  <= std_logic_vector(reg_ram_data_out(to_integer(unsigned(reg_buffer_addr(1 downto 0)))));
                      ram_debug_read(to_integer(unsigned(reg_buffer_addr(1 downto 0)))) <= '1';
         when "11" => 
-          DEBUG_BUFFER_DATA  <= (others => '0');
+          DEBUG_BUFFER_DATA  <= std_logic_vector(invalid_word_count(c));
         when others => null;  
       end case;
     else
@@ -182,6 +184,22 @@ ram_reset      <= CONTROL(5)  when rising_edge(CLK);
 baseline_reset <= CONTROL(8)  when rising_edge(CLK);
 readout_reset  <= CONTROL(12) when rising_edge(CLK);
 
+-------------------------------------------------------------------------------
+-- Check words
+-------------------------------------------------------------------------------
+gen_word_checker : for i in 0 to CHANNELS-1 generate
+  process begin
+    wait until rising_edge(CLK);
+    if ADC_VALID = '1' then
+      if ADC_DATA(RESOLUTION*(i+1)-1 downto RESOLUTION*i) /= CONF.check_word1 and
+         ADC_DATA(RESOLUTION*(i+1)-1 downto RESOLUTION*i) /= CONF.check_word2 then
+        invalid_word_count(i) <= invalid_word_count(i) + 1; 
+      end if;
+    end if;
+  end process;
+end generate;
+
+
 -------------------------------------------------------------------------------
 -- Preprocessing
 -------------------------------------------------------------------------------