Start working on demux, Ingo

diff --git a/trb_net_io_multiplexer.vhd b/trb_net_io_multiplexer.vhd
new file mode 100644 (file)
index 0000000..0348415
--- /dev/null
+++ b/trb_net_io_multiplexer.vhd
@@ -0,0 +1,127 @@
+-- for a description see HADES wiki
+-- http://hades-wiki.gsi.de/cgi-bin/view/DaqSlowControl/TrbNetIBUF
+
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE IEEE.STD_LOGIC_ARITH.ALL;
+USE IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+use work.trb_net_std.all;
+
+
+entity trb_net_io_multiplexer is
+
+  generic (BUS_WIDTH : integer := 51;
+           MULT_WIDTH : integer := 1);
+
+  port(
+    --  Misc
+    CLK    : in std_logic;             
+    RESET  : in std_logic;     
+    CLK_EN : in std_logic;
+    --  Media direction port
+    MED_DATAREADY_IN:  in  STD_LOGIC; 
+    MED_DATA_IN:       in  STD_LOGIC_VECTOR (BUS_WIDTH downto 0);  -- highest
+                                                                   -- bits are
+                                                                   -- mult.
+    MED_READ_OUT:      out STD_LOGIC; 
+
+    MED_DATAREADY_OUT: in  STD_LOGIC; 
+    MED_DATA_OUT:      in  STD_LOGIC_VECTOR (BUS_WIDTH downto 0);  -- highest
+                                                                   -- bits are
+                                                                   -- mult.
+    MED_READ_IN:       out STD_LOGIC;
+    
+    -- Internal direction port
+    INT_DATAREADY_OUT: out STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0);
+    INT_DATA_OUT:      out STD_LOGIC_VECTOR ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH) downto 0);  
+    INT_READ_IN:       in  STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0);
+
+    INT_DATAREADY_IN:  out STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0);
+    INT_DATA_IN:       out STD_LOGIC_VECTOR ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH) downto 0);  
+    INT_READ_OUT:      in  STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0);
+
+    
+    
+    -- Status and control port
+    STAT:              out STD_LOGIC_VECTOR (31 downto 0)
+    );
+END trb_net_io_multiplexer;
+
+architecture trb_net_io_multiplexer_arch of trb_net_io_multiplexer is
+
+  component trb_net_pattern_gen is
+
+  generic (MULT_WIDTH : integer := 3);     
+
+  port(
+    INPUT_IN  : in  STD_LOGIC_VECTOR (MULT_WIDTH downto 0);
+    RESULT_OUT: out STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0)
+    );
+  END component;
+  
+  signal current_demux_buffer, next_demux_buffer: STD_LOGIC_VECTOR (BUS_WIDTH downto 0);
+  signal current_demux_empty,  next_demux_empty: STD_LOGIC;
+  signal current_demux_READ,   next_demux_READ: STD_LOGIC;
+  signal current_demux_dr, next_demux_dr: STD_LOGIC_VECTOR ((2**MULT_WIDTH) downto 0);
+  signal demux_read: STD_LOGIC;         -- buffer is read out and killed
+
+  
+  begin
+
+
+-------------------------------------------------------------------------------
+-- DEMUX
+-------------------------------------------------------------------------------
+    
+    -- the simpler part is the demux
+    comb_demux : process (current_demux_empty, demux_read, current_demux_buffer,
+                          current_demux_READ, MED_DATAREADY_IN)
+    begin  -- process
+      next_demux_READ <= '0';
+      next_demux_buffer <= current_demux_buffer;
+      if current_demux_empty = '1' or demux_read = '1' then  -- no problem to read in next step
+        next_demux_READ <= '1';
+      end if;
+      if current_demux_READ = '1' and MED_DATAREADY_IN = '1' then
+--definition of read
+        next_demux_buffer <= MED_DATA_IN;
+      end if;      
+    end process;
+    
+-- define next DRx
+    DEF_DR: trb_net_pattern_gen
+      generic map (MULT_WIDTH => MULT_WIDTH)     
+      port map (
+        INPUT_IN => next_demux_buffer (BUS_WIDTH downto (BUS_WIDTH-MULT_WIDTH)),
+        RESULT_OUT => next_demux_dr
+    );  
+    
+    sync_demux : process(CLK)
+    begin
+    if rising_edge(CLK) then
+      if RESET = '1' then
+        current_demux_buffer  <= (others => '0');
+        current_demux_empty   <= '0';
+        current_demux_READ    <= '0';
+        current_demux_dr      <= (others => '0');
+      elsif CLK_EN = '1' then
+        current_demux_buffer  <= next_demux_buffer;
+        current_demux_empty   <= next_demux_empty;
+        current_demux_READ    <= next_demux_READ;
+        current_demux_dr      <= next_demux_dr;
+      else
+        current_demux_buffer  <= current_demux_buffer;
+        current_demux_empty   <= current_demux_empty;
+        current_demux_READ    <= current_demux_READ;
+        current_demux_dr      <= current_demux_dr;
+      end if;
+    end if;
+  end process;
+
+  INT_DATAREADY_OUT <= current_demux_dr;
+  INT_DATA_OUT      <= current_demux_buffer ((BUS_WIDTH-MULT_WIDTH)*(2**MULT_WIDTH) downto 0);  
+  
+    
+end trb_net_io_multiplexer_arch;
+  

diff --git a/trb_net_obuf.vhd b/trb_net_obuf.vhd
index 2d0122c03f6780bcbca07b29bff5fcc5c7fda1bd..cc230d485726b51974dc115ec7ec39e3506421b4 100644 (file)
--- a/trb_net_obuf.vhd
+++ b/trb_net_obuf.vhd
@@ -181,6 +181,7 @@ architecture trb_net_obuf_arch of trb_net_obuf is
                            "0000000000100000" when REC_BUFFER_SIZE_IN="0100" else
                            "0000000000000010";
 -- next_max_DATA_COUNT <= 2 ** (REC_BUFFER_SIZE_IN + 1);
+    -- BUGBUG via pattern_gen
 
   reg_max_DATA_COUNT : process(CLK)
     begin

diff --git a/trb_net_pattern_gen.vhd b/trb_net_pattern_gen.vhd
new file mode 100644 (file)
index 0000000..aaa4cae
--- /dev/null
+++ b/trb_net_pattern_gen.vhd
@@ -0,0 +1,41 @@
+--generate demux pattern from input
+--combinatorial entity only
+
+
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE IEEE.STD_LOGIC_ARITH.ALL;
+USE IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+use work.trb_net_std.all;
+
+--Entity decalaration for clock generator
+entity trb_net_pattern_gen is
+
+  generic (MULT_WIDTH : integer := 3);     
+
+  port(
+    INPUT_IN  : in  STD_LOGIC_VECTOR (MULT_WIDTH downto 0);
+    RESULT_OUT: out STD_LOGIC_VECTOR (2**MULT_WIDTH downto 0)
+    );
+END trb_net_pattern_gen;
+
+architecture trb_net_pattern_gen_arch of trb_net_pattern_gen is
+  begin
+
+    G1: for i in 2**MULT_WIDTH downto 0 generate
+      G2: process (INPUT_IN)
+      begin  -- process
+        if (2**i) = INPUT_IN then
+          RESULT_OUT(i) <= '1';
+        else
+          RESULT_OUT(i) <= '0';
+        end if;
+      end process;
+
+        
+    end generate;
+    
+
+end trb_net_pattern_gen_arch;
+