reenable timestamp generator option in Trb3sc CTS

diff --git a/cts/config_simple.vhd b/cts/config_simple.vhd
index 3cd126b6e3f014090f47e0bd397add6fe4773007..2dad47b0b052f6a4a9ffb0b8edf86e6d0c20aaa7 100644 (file)
--- a/cts/config_simple.vhd
+++ b/cts/config_simple.vhd
@@ -68,22 +68,22 @@ package config is
     
     constant GEN_BUSY_OUTPUT         : integer := c_NO;
     
-    constant TRIGGER_COIN_COUNT      : integer := 1;
+    constant TRIGGER_COIN_COUNT      : integer := 2;
     constant TRIGGER_PULSER_COUNT    : integer := 3;
     constant TRIGGER_RAND_PULSER     : integer := 1;
-    constant TRIGGER_ADDON_COUNT     : integer := 4;
+    constant TRIGGER_ADDON_COUNT     : integer := 10;
     constant PERIPH_TRIGGER_COUNT    : integer := 0;      
     constant ADDON_LINE_COUNT        : integer := 36 - USE_RJADAPT*12;  --36 with Padiwa, 22 with RJ-adapter
     constant CTS_OUTPUT_MULTIPLEXERS : integer := 2;
 --TODO:    
 --     constant INCLUDE_MBS_MASTER : integer range c_NO to c_YES := c_NO; 
 --Which external trigger module (ETM) to use?
-     constant INCLUDE_ETM            : integer range c_NO to c_YES := c_YES;
+     constant INCLUDE_ETM            : integer range c_NO to c_YES := c_NO;
      type ETM_CHOICE_type is (ETM_CHOICE_MBS_VULOM, ETM_CHOICE_MAINZ_A2, ETM_CHOICE_CBMNET, ETM_CHOICE_M26, ETM_CHOICE_R3B);
      constant ETM_CHOICE : ETM_CHOICE_type := ETM_CHOICE_MBS_VULOM;
      constant ETM_ID : std_logic_vector(7 downto 0);
 
-   constant INCLUDE_TIMESTAMP_GENERATOR : integer := c_NO;
+   constant INCLUDE_TIMESTAMP_GENERATOR : integer := c_YES;
     
     
     

diff --git a/cts/trb3sc_cts.vhd b/cts/trb3sc_cts.vhd
index 257c562dad5f7ab0c67553b4e61bf6752135e730..6c546e2317210597ff190a565a49996b53915862 100644 (file)
--- a/cts/trb3sc_cts.vhd
+++ b/cts/trb3sc_cts.vhd
@@ -954,21 +954,21 @@ end generate;
 ---------------------------------------------------------------------------
 -- Add timestamp generator
 ---------------------------------------------------------------------------
---   GEN_TIMESTAMP : if INCLUDE_TIMESTAMP_GENERATOR = c_YES generate
---     THE_TIMESTAMP : entity work.timestamp_generator 
---       port map(
---         CLK               => clk_sys,
---         RESET_IN          => reset_i,
---         
---         TIMER_CLOCK_IN    => KEL(20), 
---         TIMER_RESET_IN    => KEL(21),
--- 
---         TRIGGER_IN         => cts_trigger_out,
---         BUSRDO_RX          => cts_rdo_rx,
---         BUSRDO_TX          => cts_rdo_additional(0)
---         );
---   end generate;  
---   
+  GEN_TIMESTAMP : if INCLUDE_TIMESTAMP_GENERATOR = c_YES generate
+    THE_TIMESTAMP : entity work.timestamp_generator 
+      port map(
+        CLK               => clk_sys,
+        RESET_IN          => reset_i,
+        
+        TIMER_CLOCK_IN    => timer.tick_us, 
+        TIMER_RESET_IN    => RJ_IO_IN(0),
+
+        TRIGGER_IN         => cts_trigger_out,
+        BUSRDO_RX          => cts_rdo_rx,
+        BUSRDO_TX          => cts_rdo_additional(INCLUDE_ETM)
+        );
+  end generate;  
+  
 --   assert not(INCLUDE_ETM = c_YES and INCLUDE_TIMESTAMP_GENERATOR = c_YES) report "Timestamp generator and ETM can not be implemented at the same time (TODO: fix this)" severity failure;
 --   
 ---------------------------------------------------------------------------
@@ -1047,30 +1047,7 @@ end generate;
     busr3b_tx.unknown <= busr3b_rx.read or busr3b_rx.write when rising_edge(clk_sys);
   end generate;
 
-  
------------------------------------------------------------------------------
----- Hades Spill Mon - not a real CTS module, but CTS framework needed
------------------------------------------------------------------------------  
-  --gen_hsm_etm : if ETM_CHOICE = ETM_CHOICE_SPILLMON and INCLUDE_ETM = c_YES generate
-    --THE_SPILLMON : entity work.hadesspillmon
-      --port map(
-        --CLK     => clk_sys,
-        --CLK_200 => clk_full,
-        --RESET   => reset_i,
-        
-        --INP     => INP(15 downto 0),
-        --START   => SPARE_IN(0),
-        
-        --BUS_RX         => busr3b_rx,
-        --BUS_TX         => busr3b_tx
-        --);
-        
-    --cts_rdo_additional(0).data          <= (others => '0');
-    --cts_rdo_additional(0).data_write    <= '0';
-    --cts_rdo_additional(0).data_finished <= '1';
-    --cts_rdo_additional(0).statusbits    <= (others => '0');
-  --end generate;
-  
+
   
 ---------------------------------------------------------------------------
 -- Bus Handler