constant NUM_TDC_CHANNELS : integer range 1 to 65 := 33; -- number of tdc channels per module
constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6 := 5; --the nearest power of two, for convenience reasons
- constant EVENT_BUFFER_SIZE : integer range 9 to 13 := 11; -- size of the event buffer, 2**N
- constant EVENT_MAX_SIZE : integer := 400; --maximum event size. Must not exceed EVENT_BUFFER_SIZE/2
+ constant EVENT_BUFFER_SIZE : integer range 9 to 13 := 12; -- size of the event buffer, 2**N
+ constant EVENT_MAX_SIZE : integer := 200; --maximum event size. Must not exceed EVENT_BUFFER_SIZE/2
--Use sync mode, RX clock for all parts of the FPGA
MULTICYCLE FROM ASIC THE_MEDIA_INTERFACE/gen_pcs0.THE_SERDES/serdes_sync_0_inst/DCU0_inst PIN SCIRDATA* 15 ns;
REGION "MEDIA" "R57C34D" 13 30;
-LOCATE UGROUP "THE_MEDIA_INTERFACE/media_interface_group" REGION "MEDIA" ;
+#LOCATE UGROUP "THE_MEDIA_INTERFACE/media_interface_group" REGION "MEDIA" ;
#REGION "RESTAREA" "R2C12D" 65 67;
#UGROUP "REST"
use work.trb3_components.all;
use work.med_sync_define.all;
+
entity mdctdc is
port(
CLK : in std_logic;
signal prepare_for_reload_i : std_logic;
signal sd_txdis_i : std_logic;
+ signal dtrout : std_logic_vector(7 downto 0);
+
+
+
+
begin
---------------------------------------------------------------------------
THE_MEDIA_INTERFACE : entity work.med_ecp5_sfp_sync
generic map(
- USE_NEW_ECP5_RESET => 0,
+ USE_NEW_ECP5_RESET => c_YES,
SERDES_NUM => 0,
IS_SYNC_SLAVE => c_YES
)
---------------------------------------------------------------------------
-- LED
---------------------------------------------------------------------------
- LED(0) <= (med2int(0).stat_op(10) or med2int(0).stat_op(11)) and not led_off;
- LED(1) <= med2int(0).stat_op(9) and not led_off;
- LED(2) <= (LVDS(1) or LVDS(0) or dummy_i or FLASH_SELECT) and not led_off;
-
+ LED(0) <= med2int(0).stat_op(15); --med2int(0).stat_op(9) and not led_off; --Link active
+ LED(2) <= reset_i; --(med2int(0).stat_op(10) or med2int(0).stat_op(11)) and not led_off; --TX/RX
+ LED(1) <= med2int(0).stat_op(13); -- (FLASH_SELECT) and not led_off;
+ IO(1) <= GPIO(0) when rising_edge(clk_sys); --LOS
+ IO(2) <= med2int(0).stat_op(4); --rx_allow
--------------------------------------------------------------------------
-- Controls
SPI_RST_OUT => RSTN
);
-
+
-------------------------------------------------------------------------------
-- No trigger/data endpoint included
-------------------------------------------------------------------------------
#-m nodelist.txt # Controlled by the compile.pl script.
#-n 1 # Controlled by the compile.pl script.
-s 10
--t 2
+-t 18
-c 2
-e 2
-i 10
TOPNAME => "mdcoep",
lm_license_file_for_synplify => "27020\@jspc29", #"27000\@lxcad01.gsi.de";
-lm_license_file_for_par => "1702\@jspc29",
+lm_license_file_for_par => "1710\@jspc29", #1702
lattice_path => '/d/jspc29/lattice/diamond/3.12',
synplify_path => '/d/jspc29/lattice/synplify/S-2021.09-SP2/',
LED : out std_logic_vector(7 downto 0);
--Other Connectors
+ LONG_SHORT : in std_logic;
IO : inout std_logic_vector(8 downto 1)
);
THE_MEDIA_INTERFACE : entity work.med_ecp5_sfp_sync_2
generic map(
- USE_NEW_ECP5_RESET => 0,
+ USE_NEW_ECP5_RESET => c_NO,
DUAL => 0,
IS_SYNC_SLAVE => (c_YES,c_NO)
)
---------------------------------------------------------------------------
THE_DOWN_INTERFACE_2 : entity work.med_ecp5_sfp_sync_2
generic map(
- USE_NEW_ECP5_RESET => 0,
+ USE_NEW_ECP5_RESET => c_NO,
DUAL => 1,
IS_SYNC_SLAVE => (c_NO,c_NO)
monitor_inputs_i <= (others => '0');
trigger_inputs_i <= (others => '0');
-IO(3) <= GPIO(1) when rising_edge(clk_sys);
-IO(4) <= med_dataready_in(1);
-IO(5) <= hub_stat_debug(8);
-IO(6) <= GPIO(5) when rising_edge(clk_sys);
-IO(7) <= med_dataready_in(3);
-IO(8) <= hub_stat_debug(9);
+-- IO(3) <= GPIO(1) when rising_edge(clk_sys);
+-- IO(4) <= med_dataready_in(1);
+-- IO(5) <= hub_stat_debug(8);
+-- IO(6) <= GPIO(5) when rising_edge(clk_sys);
+-- IO(7) <= med_dataready_in(3);
+-- IO(8) <= hub_stat_debug(9);
--IO(7) <= hub_stat_debug(8);
--IO(8) <= hub_stat_debug(9);
-
+IO(3) <= int2med(0).dataready;
+IO(4) <= med2int(0).stat_op(15);
+IO(5) <= GPIO(1) when rising_edge(clk_sys);
+IO(6) <= med2int(1).stat_op(4);
+IO(7) <= med2int(0).dataready;
+IO(8) <= med2int(0).stat_op(4);
---------------------------------------------------------------------------
-- LED
LED(1) <= med2int(0).stat_op(9) and not led_off;
LED(2) <= FLASH_SELECT and not led_off;
- LED(3) <= (med2int(1).stat_op(10) or med2int(1).stat_op(11)) and not led_off;
- LED(4) <= (med2int(2).stat_op(10) or med2int(2).stat_op(11)) and not led_off;
- LED(5) <= (med2int(3).stat_op(10) or med2int(3).stat_op(11)) and not led_off;
+ LED(3) <= (med2int(1).stat_op(10)) and not led_off; --only on RX
+ LED(4) <= (med2int(2).stat_op(10)) and not led_off; --only on RX
+ LED(5) <= (med2int(3).stat_op(10)) and not led_off; --only on RX
--- /dev/null
+// nodes file for parallel place&route
+
+[jspc85]
+SYSTEM = linux
+CORENUM = 7
+ENV = /d/jspc29/lattice/312_settings.sh
+WORKDIR = /d/jspc22/trb/git/mdcupgrade/OEP/workdir
#-m nodelist.txt # Controlled by the compile.pl script.
#-n 1 # Controlled by the compile.pl script.
-s 10
--t 6
+-t 30
-c 2
-e 2
-i 10
BLOCK RESETPATHS ;\r
BLOCK ASYNCPATHS ;\r
\r
-SYSCONFIG MCCLK_FREQ=38.8 CONFIG_IOVOLTAGE=2.5 ; #BACKGROUND_RECONFIG=ON\r
+SYSCONFIG MCCLK_FREQ=38.8 CONFIG_IOVOLTAGE=2.5 BACKGROUND_RECONFIG=OFF ;\r
FREQUENCY PORT CLK 200 MHz;\r
BLOCK PATH TO PORT "LED*";\r
BLOCK PATH TO PORT "PROGRAMN";\r