adding files to project

diff --git a/ADC/trb3_periph_adc.prj b/ADC/trb3_periph_adc.prj
index aecf00af5e84468140b572b3835ec8ae55daa770..4919218c5805949220ee44bf0346356d5fe0927f 100644 (file)
--- a/ADC/trb3_periph_adc.prj
+++ b/ADC/trb3_periph_adc.prj
@@ -147,13 +147,17 @@ add_file -vhdl -lib "work" "../base/cores/pll_adc10bit.vhd"
 add_file -vhdl -lib "work" "../base/cores/pll_adc10bit_80.vhd"
 add_file -vhdl -lib "work" "../base/cores/dqsinput_7x5.vhd"
 add_file -vhdl -lib "work" "../base/cores/dqsinput_5x5.vhd"
+add_file -vhdl -lib "work" "sim/dqsinput_dummy.vhd"
 add_file -vhdl -lib "work" "../base/cores/fifo_cdt_200_50.vhd"
 add_file -vhdl -lib "work" "../base/code/sedcheck.vhd"
 
 
 add_file -vhdl -lib "work" "cores/mulacc2.vhd"
+add_file -vhdl -lib "work" "cores/dpram_32x512.vhd"
 add_file -vhdl -lib "work" "source/adc_package.vhd"
 add_file -vhdl -lib "work" "source/adc_processor.vhd"
+add_file -vhdl -lib "work" "source/adc_processor_cfd.vhd"
+add_file -vhdl -lib "work" "source/adc_processor_cfd_ch.vhd"
 add_file -vhdl -lib "work" "source/adc_ad9219.vhd"
 add_file -vhdl -lib "work" "source/adc_handler.vhd"
 add_file -vhdl -lib "work" "source/adc_slowcontrol_data_buffer.vhd"