]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
WAP included
authorMichael Boehmer <mboehmer@ph.tum.de>
Tue, 24 May 2022 20:22:49 +0000 (22:22 +0200)
committerMichael Boehmer <mboehmer@ph.tum.de>
Tue, 24 May 2022 20:22:49 +0000 (22:22 +0200)
media_interfaces/ecp5/chan0_1_125M/serdes_sync_0_125M.vhd
media_interfaces/med_ecp5_sfp_sync_RS.vhd

index 9d91510ae3141641d17baf2600eec56c7183b135..b5436baf902fb34030759573f91594661719e484 100644 (file)
@@ -165,10 +165,10 @@ begin
         CH1_WA_MODE=>"0b0",CH1_INVERT_RX=>"0b0",CH1_INVERT_TX=>"0b0",CH1_PRBS_SELECTION=>"0b0",
         CH1_GE_AN_ENABLE=>"0b0",CH1_PRBS_LOCK=>"0b0",CH1_PRBS_ENABLE=>"0b0",
         CH1_ENABLE_CG_ALIGN=>"0b1",CH1_TX_GEAR_MODE=>"0b0",CH1_RX_GEAR_MODE=>"0b0",
-        CH1_PCS_DET_TIME_SEL=>"0b00",CH1_PCIE_EI_EN=>"0b0",CH1_TX_GEAR_BYPASS=>"0b0",
+        CH1_PCS_DET_TIME_SEL=>"0b00",CH1_PCIE_EI_EN=>"0b0",CH1_TX_GEAR_BYPASS=>"0b1",
         CH1_ENC_BYPASS=>"0b0",CH1_SB_BYPASS=>"0b0",CH1_RX_SB_BYPASS=>"0b0",
         CH1_WA_BYPASS=>"0b0",CH1_DEC_BYPASS=>"0b0",CH1_CTC_BYPASS=>"0b1",
-        CH1_RX_GEAR_BYPASS=>"0b0",CH1_LSM_DISABLE=>"0b0",CH1_MATCH_2_ENABLE=>"0b0",
+        CH1_RX_GEAR_BYPASS=>"0b1",CH1_LSM_DISABLE=>"0b0",CH1_MATCH_2_ENABLE=>"0b0",
         CH1_MATCH_4_ENABLE=>"0b1",CH1_MIN_IPG_CNT=>"0b11",CH1_CC_MATCH_1=>"0x1BC",
         CH1_CC_MATCH_2=>"0x11C",CH1_CC_MATCH_3=>"0x11C",CH1_CC_MATCH_4=>"0x11C",
         CH1_UDF_COMMA_MASK=>"0x0ff",CH1_UDF_COMMA_A=>"0x083",CH1_UDF_COMMA_B=>"0x07C",
index 052bd0ef9c6d77c1cf1586419a22219e65e0a306..ea21734f1e45113200e60067fb9fc1cab25fa49a 100644 (file)
@@ -286,7 +286,7 @@ gen_SERDES: if LINK_SPEED = 125 generate
       serdes_sync_0_125M_rx_k              => rx_k,
       serdes_sync_0_125M_rx_disp_err       => open,
       serdes_sync_0_125M_rx_cv_err         => rx_error,
-      serdes_sync_0_125M_signal_detect_c   => '1', -- ???
+      serdes_sync_0_125M_signal_detect_c   => '1', -- LSM enable
       serdes_sync_0_125M_rx_cdr_lol_s      => rx_cdr_lol,
       serdes_sync_0_125M_rx_los_low_s      => rx_los_low,
       serdes_sync_0_125M_lsm_status_s      => lsm_status,
@@ -345,7 +345,7 @@ gen_SERDES: if LINK_SPEED = 200 generate
       serdes_sync_0_200M_rx_k              => rx_k,
       serdes_sync_0_200M_rx_disp_err       => open,
       serdes_sync_0_200M_rx_cv_err         => rx_error(0),
-      serdes_sync_0_200M_signal_detect_c   => '1', -- ???
+      serdes_sync_0_200M_signal_detect_c   => '1', -- LSM enable
       serdes_sync_0_200M_rx_cdr_lol_s      => rx_cdr_lol,
       serdes_sync_0_200M_rx_los_low_s      => rx_los_low,
       serdes_sync_0_200M_lsm_status_s      => lsm_status,
@@ -444,9 +444,9 @@ end generate;
   cv_cnt     <= cv_cnt + 1 when rx_error(0) = '1' and rising_edge(clk_rx_full);
 
   -- tricky...
---  wa_position_sel <= wa_position_i(3 downto 0)   when ((SERDES_NUM = 0) or (SERDES_NUM = 2))
---                else wa_position_i(7 downto 4)   when ((SERDES_NUM = 1) or (SERDES_NUM = 3));
-  wa_position_sel <= x"0"; -- BUG
+  wa_position_sel <= wa_position_i(3 downto 0)   when ((SERDES_NUM = 0) or (SERDES_NUM = 2))
+                else wa_position_i(7 downto 4)   when ((SERDES_NUM = 1) or (SERDES_NUM = 3));
+--  wa_position_sel <= x"0"; -- BUG
 
   RX_DLM_OUT  <= rx_dlm_i;