Correct shift register

diff --git a/ADC/source/adc_processor_cfd_ch.vhd b/ADC/source/adc_processor_cfd_ch.vhd
index c1e4a157a8ce94cc7400787bcb6ce75fa5954cdb..6572e1280fe1391821a0940f7043ad423c783de1 100644 (file)
--- a/ADC/source/adc_processor_cfd_ch.vhd
+++ b/ADC/source/adc_processor_cfd_ch.vhd
@@ -106,7 +106,7 @@ begin
   proc_baseline_delay : process is
   begin
     wait until rising_edge(CLK);
-    delay_baseline     <= delay_baseline(delay_baseline'high downto 1) & delay_baseline_in;
+    delay_baseline     <= delay_baseline(delay_baseline'high-1 downto 0) & delay_baseline_in;
     delay_baseline_out <= delay_baseline(delay_baseline'high);
   end process proc_baseline_delay;