hub_test: Add microslice DLM pulse generation

diff --git a/hub_test/src/hub_test.vhd b/hub_test/src/hub_test.vhd
index 914f1c8603270943a8e4c7a1e8e6b9b0f73a3578..a4767eef0fd7581503583bbc02d36de587c2850f 100644 (file)
--- a/hub_test/src/hub_test.vhd
+++ b/hub_test/src/hub_test.vhd
@@ -202,11 +202,10 @@ architecture behavioral of hub_test is
     attribute KEEP of trb_data_tkeep : signal is "true";
     attribute KEEP of trb_data_tlast : signal is "true";
 
-    signal usrclk : std_logic;
-
-    constant MS_PERIOD_COUNTS : integer := 10240; -- assuming clock with 10 ns period
+    constant MS_PERIOD_COUNTS : integer := 20480; -- assuming clock with 5 ns period
     signal ms_count : integer range 0 to MS_PERIOD_COUNTS - 1 := 0;
     signal trg_out : std_logic := '0';
+    signal dlm : std_logic := '0';
 begin
     IBUFDS_baseclk : IBUFDS
     port map (
@@ -353,8 +352,11 @@ begin
         MEDIA_INT2MED(3)  => int2med_i(6),
         RX_DLM            => open,
         RX_DLM_WORD       => open,
-        TX_DLM            => open,
-        TX_DLM_WORD       => open,
+        TX_DLM(0)         => '0',
+        TX_DLM(1)         => dlm,
+        TX_DLM(2)         => dlm,
+        TX_DLM(3)         => dlm,
+        TX_DLM_WORD       => x"00_00_00_00",
         SD_LOS_IN(0)      => mpod_a_los(10),
         SD_LOS_IN(1)      => mpod_a_los(11),
         SD_LOS_IN(2)      => mpod_a_los(8),
@@ -366,15 +368,14 @@ begin
         BUS_RX            => bussci2_rx,
         BUS_TX            => bussci2_tx,
         STAT_DEBUG        => open,
-        CTRL_DEBUG        => open
+        CTRL_DEBUG        => (others => '0')
     );
 
-    usrclk <= med2int_i(4).clk_half;
 
     -- Create a 100 ns test pulse for debugging of microslice timing
-    process (usrclk) is
+    process (sysclk_200) is
     begin
-        if rising_edge(usrclk) then
+        if rising_edge(sysclk_200) then
             if ms_count = MS_PERIOD_COUNTS - 1 then
                 ms_count <= 0;
             else
@@ -385,6 +386,11 @@ begin
             else
                 trg_out <= '0';
             end if;
+            if ms_count = 0 then
+                dlm <= '1';
+            else
+                dlm <= '0';
+            end if;
         end if;
     end process;
 
@@ -453,8 +459,11 @@ begin
         MEDIA_INT2MED(3)  => int2med_i(1),
         RX_DLM            => open,
         RX_DLM_WORD       => open,
-        TX_DLM            => open,
-        TX_DLM_WORD       => open,
+        TX_DLM(0)         => dlm,
+        TX_DLM(1)         => dlm,
+        TX_DLM(2)         => dlm,
+        TX_DLM(3)         => dlm,
+        TX_DLM_WORD       => x"00_00_00_00",
         SD_LOS_IN(0)      => mpod_a_los(6),
         SD_LOS_IN(1)      => mpod_a_los(7),
         SD_LOS_IN(2)      => mpod_a_los(5),
@@ -466,7 +475,7 @@ begin
         BUS_RX            => bussci3_rx,
         BUS_TX            => bussci3_tx,
         STAT_DEBUG        => open,
-        CTRL_DEBUG        => open
+        CTRL_DEBUG        => (others => '0')
     );
 
 
@@ -505,8 +514,11 @@ begin
         MEDIA_INT2MED(3)  => int2med_unused(0),
         RX_DLM            => open,
         RX_DLM_WORD       => open,
-        TX_DLM            => open,
-        TX_DLM_WORD       => open,
+        TX_DLM(0)         => dlm,
+        TX_DLM(1)         => dlm,
+        TX_DLM(2)         => dlm,
+        TX_DLM(3)         => dlm,
+        TX_DLM_WORD       => x"00_00_00_00",
         SD_LOS_IN(0)      => mpod_a_los(1),
         SD_LOS_IN(1)      => mpod_a_los(3),
         SD_LOS_IN(2)      => mpod_a_los(2),
@@ -518,7 +530,7 @@ begin
         BUS_RX            => bussci4_rx,
         BUS_TX            => bussci4_tx,
         STAT_DEBUG        => open,
-        CTRL_DEBUG        => open
+        CTRL_DEBUG        => (others => '0')
     );