*** empty log message ***

diff --git a/base/trb3_central.lpf b/base/trb3_central.lpf
index 1d8f6205ddf98749912a5ad028bde5b12356ac9e..c0f56a6ab1c55b81b655990def836f5fb9aa1992 100644 (file)
--- a/base/trb3_central.lpf
+++ b/base/trb3_central.lpf
@@ -196,7 +196,7 @@ LOCATE COMP  "FPGA4_CONNECTOR_6"    SITE "AL29";
 LOCATE COMP  "FPGA4_CONNECTOR_7"    SITE "AK29";
 
 DEFINE PORT GROUP "FPGA_group" "FPGA*" ;
-IOBUF GROUP "FPGA_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN DRIVE=8;
+IOBUF GROUP "FPGA_group" IO_TYPE=LVCMOS25 PULLMODE=UP;
 
 LOCATE COMP  "FPGA1_TTL_0"    SITE "J21";  #202 #was F1_3V3_LINE etc.
 LOCATE COMP  "FPGA1_TTL_1"    SITE "H22";  #204

diff --git a/base/trb3_central.prj b/base/trb3_central.prj
index e6e59c9c27b810c45dcbff242addb3e40174166f..a2d34d0b995ef928fb2d2eb9d12036cde668e9cc 100644 (file)
--- a/base/trb3_central.prj
+++ b/base/trb3_central.prj
@@ -109,10 +109,12 @@ add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo_dualclock_width_16_reg.
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net_fifo_16bit_bram_dualport.vhd"
 
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/serdes_onboard_full.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_0_200_int.vhd"
 
 add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_lsm_sfp.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_med_ecp3_sfp.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_0_200_int.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_med_ecp3_sfp_4_onboard.vhd"
 
 add_file -vhdl -lib work "../base/cores/pll_in200_out100.vhd"
 add_file -vhdl -lib work "./trb3_central.vhd"

diff --git a/base/trb3_central.vhd b/base/trb3_central.vhd
index 0d7e0dee363404158c1f6e068061b4fbea7366c7..b119be91f07a63e1fec84984d596f0aa9c4f628b 100644 (file)
--- a/base/trb3_central.vhd
+++ b/base/trb3_central.vhd
@@ -31,10 +31,10 @@ entity trb3_central is
     CLK_SERDES_INT_RIGHT           : in  std_logic;  --Clock Manager 1/0, off, 125 MHz possible
     
     --SFP
-    SFP_RX_P                       : in  std_logic_vector(8 downto 1); 
-    SFP_RX_N                       : in  std_logic_vector(8 downto 1); 
-    SFP_TX_P                       : out std_logic_vector(8 downto 1); 
-    SFP_TX_N                       : out std_logic_vector(8 downto 1); 
+    SFP_RX_P                       : in  std_logic_vector(16 downto 1); 
+    SFP_RX_N                       : in  std_logic_vector(16 downto 1); 
+    SFP_TX_P                       : out std_logic_vector(16 downto 1); 
+    SFP_TX_N                       : out std_logic_vector(16 downto 1); 
     SFP_TX_FAULT                   : in  std_logic_vector(8 downto 1); --TX broken
     SFP_RATE_SEL                   : out std_logic_vector(8 downto 1); --not supported by our SFP
     SFP_LOS                        : in  std_logic_vector(8 downto 1); --Loss of signal
@@ -283,7 +283,49 @@ SFP_TXDIS(8 downto 2) <= (others => '1');
 ---------------------------------------------------------------------------
 -- The TrbNet media interface (to other FPGA)
 ---------------------------------------------------------------------------
-med_stat_op(63 downto 0) <= x"0007000700070007";
+THE_MEDIA_ONBOARD : trb_net16_med_ecp3_sfp_4_onboard
+  port map(
+    CLK                => clk_200_i,
+    SYSCLK             => clk_100_i,
+    RESET              => reset_i,
+    CLEAR              => clear_i,
+    CLK_EN             => '1',
+    --Internal Connection
+    MED_DATA_IN        => med_data_out(63 downto 0),
+    MED_PACKET_NUM_IN  => med_packet_num_out(11 downto 0),
+    MED_DATAREADY_IN   => med_dataready_out(3 downto 0),
+    MED_READ_OUT       => med_read_in(3 downto 0),
+    MED_DATA_OUT       => med_data_in(63 downto 0),
+    MED_PACKET_NUM_OUT => med_packet_num_in(11 downto 0),
+    MED_DATAREADY_OUT  => med_dataready_in(3 downto 0),
+    MED_READ_IN        => med_read_out(3 downto 0),
+    REFCLK2CORE_OUT    => open,
+    --SFP Connection
+    SD_RXD_P_IN        => SFP_RX_P(12 downto 9),
+    SD_RXD_N_IN        => SFP_RX_N(12 downto 9),
+    SD_TXD_P_OUT       => SFP_TX_P(12 downto 9),
+    SD_TXD_N_OUT       => SFP_TX_N(12 downto 9),
+    SD_REFCLK_P_IN     => open,
+    SD_REFCLK_N_IN     => open,
+    SD_PRSNT_N_IN(0)   => FPGA1_COMM(2),
+    SD_PRSNT_N_IN(1)   => FPGA2_COMM(2),
+    SD_PRSNT_N_IN(2)   => FPGA3_COMM(2),
+    SD_PRSNT_N_IN(3)   => FPGA4_COMM(2),
+    SD_LOS_IN(0)       => FPGA1_COMM(2),
+    SD_LOS_IN(1)       => FPGA2_COMM(2),
+    SD_LOS_IN(2)       => FPGA3_COMM(2),
+    SD_LOS_IN(3)       => FPGA4_COMM(2),
+    SD_TXDIS_OUT(0)    => FPGA1_COMM(0),
+    SD_TXDIS_OUT(1)    => FPGA1_COMM(1),
+    SD_TXDIS_OUT(2)    => FPGA1_COMM(2),
+    SD_TXDIS_OUT(3)    => FPGA1_COMM(3),
+    -- Status and control port
+    STAT_OP            => med_stat_op(63 downto 0),
+    CTRL_OP            => med_ctrl_op(63 downto 0),
+    STAT_DEBUG         => med_stat_debug(3*64+63 downto 0*64),
+    CTRL_DEBUG         => (others => '0')
+   );
+
 
 
 ---------------------------------------------------------------------------

diff --git a/base/trb3_central_constraints.lpf b/base/trb3_central_constraints.lpf
index e4b21f6bc2ec42cb29753f35314d9898291c5f6e..32f0bee313bfc9f4e27aeea134bd9148417ea132 100644 (file)
--- a/base/trb3_central_constraints.lpf
+++ b/base/trb3_central_constraints.lpf
@@ -28,8 +28,8 @@ LOCATE COMP   "THE_MEDIA_UPLINK/gen_serdes_0_200_THE_SERDES/PCSD_INST" SITE "PCS
 LOCATE COMP   "THE_MEDIA_ONBOARD/THE_SERDES/PCSD_INST" SITE "PCSC" ;
 
 #REGION "MEDIA_UPLINK" CLKREG "CLKREG_R6C4" 1 1;
-REGION "MEDIA_UPLINK" "R98C92" 18 17;
+REGION "MEDIA_UPLINK" "R88C92" 18 27;
 LOCATE UGROUP "THE_MEDIA_UPLINK/media_interface_group" REGION "MEDIA_UPLINK" ;
 
-REGION "MEDIA_ONBOARD" "R98C122" 30 17;
+REGION "MEDIA_ONBOARD" "R88C122" 40 27;
 LOCATE UGROUP "THE_MEDIA_ONBOARD/media_interface_group" REGION "MEDIA_UPLINK" ;