fixed missing rising_edge() line in timer

diff --git a/media_interfaces/sync/rx_reset_fsm.vhd b/media_interfaces/sync/rx_reset_fsm.vhd
index 9d016e395f46a3ad4031a60794226f74443b7e80..fd71f6d2ebeab7b84afbbfefb8a92a19ae204c72 100644 (file)
--- a/media_interfaces/sync/rx_reset_fsm.vhd
+++ b/media_interfaces/sync/rx_reset_fsm.vhd
@@ -67,15 +67,17 @@ sync_sfp_sigs : entity work.signal_sync
 
 THE_TIMER2_PROC: process( RX_REFCLK ) 
 begin
-  if reset_timer2 = '1' then
-    counter2 <= (others => '0');
-    timer2 <= '0';
-  else
-    if counter2(count_index) = '1' then
-      timer2 <= '1';
-    else
+  if( rising_edge(RX_REFCLK) ) then
+    if reset_timer2 = '1' then
+      counter2 <= (others => '0');
       timer2 <= '0';
-      counter2 <= counter2 + 1 ;
+    else
+      if counter2(count_index) = '1' then
+        timer2 <= '1';
+      else
+        timer2 <= '0';
+        counter2 <= counter2 + 1 ;
+      end if;
     end if;
   end if;
 end process THE_TIMER2_PROC;
@@ -120,7 +122,7 @@ begin
     when RX_SERDES_RESET =>
       rx_pcs_rst_ch_c_int <= '1';
       rx_serdes_rst_ch_c_int <= '1';
-      ns <= WAIT_FOR_timer1;
+      ns <= WAIT_FOR_TIMER1;
       STATE_OUT <= x"2";
                                                                                 
     when WAIT_FOR_TIMER1 =>