added included features entry for CBM/MVD readout

diff --git a/trb3/IncludedFeaturesTable.tex b/trb3/IncludedFeaturesTable.tex
index f40704a86970f0f60cf2b95422ad3ed655224c8c..82f0300838a7b15d570f57f39e449439a4b94aeb 100644 (file)
--- a/trb3/IncludedFeaturesTable.tex
+++ b/trb3/IncludedFeaturesTable.tex
@@ -44,5 +44,14 @@ Through Clock Manager (cbmtof only)\\
  & 47 -- 44 & InpMonitor  & See table 1. Pinout should match the one of the TDC\\
  & 51 -- 48 & TrgModule   & See table 1. Pinout should match the one of the TDC\\
  & 55 -- 52 & Clock       & See table 1\\
+\hline\hline
+3 & \multicolumn{3}{X|}{``MVD'' - For CBM-MVD designs.}\\
+ & 7 -- 0   & Sensors     & Number of sensor inputs \\
+ & 11 -- 8  & Chains      & Number of sensor chains \\
+ & 16       & Mode        & Normal read-out (0) or testmode (1)\\
+ & 23 -- 20 & Type        & Type of sensor. 0: M26\\
+ & 42       & Spi         & Contains SPI on all relevant I/Os depending on AddOn board design\\
+ & 43       & Uart        & Contains an Uart\\
+ & 55 -- 52 & Clock       & See table 1\\
 \hline
-\end{longtable}
\ No newline at end of file
+\end{longtable}

diff --git a/trb3/sctrladdresses.tex b/trb3/sctrladdresses.tex
index 6a7a7e4e6e12e9efdb24f14e57d198608e6f4f56..57f3be463517ba6129c26bcc3ce16c8184c0af3e 100644 (file)
--- a/trb3/sctrladdresses.tex
+++ b/trb3/sctrladdresses.tex
@@ -15,9 +15,11 @@ C000 -- CEFF & TDC & TDC Control and Status [\ref{TDC}] \\
 CF00 -- CF7F & Trg & Trigger signal generation [\ref{triggermodule}]\\
 CF80 -- CFFF & Inp & Input Monitoring [\ref{triggermodule}]\\
 D000 -- D13F & Flash & Control for SPI Flash of FPGA [\ref{flashprog}]\\
+D200         & Rom & Flash Rom Switch \\
 D300         & TrgIn & Selection for trigger and clock input on CTS \\
 D400 -- D41F & SPI & SPI Interface for DAC and Padiwa \\
 D500 -- D5FF & SED & Soft Error Detection \\
+D600 -- D6FF & Uart & Serial Uart Interface \\
 E000 -- FFFF & Debugging & Memories and Registers for Debugging \\
 \hline
 \end{tabularx}