]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
*** empty log message ***
authorhadeshyp <hadeshyp>
Fri, 12 Dec 2008 16:24:48 +0000 (16:24 +0000)
committerhadeshyp <hadeshyp>
Fri, 12 Dec 2008 16:24:48 +0000 (16:24 +0000)
testbench/trb_net16_dummy_apl.vhd
trb_net16_regIO.vhd

index 1fc6ff491d887d1b0d65ed54956ba9a24d3ae875..8d7dfec76b9bd0aba40206e62d9ee466ee818225 100644 (file)
@@ -65,12 +65,12 @@ begin
 --   address <= x"0008";
 --   reghigh <= x"DEAD";
 --   reglow  <= x"AFFE";
-  reg_F0 <= x"5E1D"; --x"0001";
+  reg_F0 <= x"1010"; --x"0001";
 
-  reg_F1 <= x"0001";
-  reg_F2 <= x"F00E";--xor_all(APL_DATA_IN) & "000000000000011";
-  reg_F3 <= x"2222";
-  APL_DTYPE_OUT <= x"F";
+  reg_F1 <= x"8000";
+  reg_F2 <= x"0000";--xor_all(APL_DATA_IN) & "000000000000011";
+  reg_F3 <= x"0000";
+  APL_DTYPE_OUT <= x"B";
   APL_TARGET_ADDRESS_OUT <= TARGET_ADDRESS;
 
   process(current_state)
index 4c633ce7be5ec35444815a358f0a926bb4a3f084..8aee02ced32e8f220df859a2f67fcfd8db9e3458 100644 (file)
@@ -195,6 +195,7 @@ architecture trb_net16_regIO_arch of trb_net16_regIO is
   signal dont_understand, next_dont_understand : std_logic;
   signal packet_counter : std_logic_vector(c_NUM_WIDTH-1 downto 0);
   signal next_packet_counter : std_logic_vector(c_NUM_WIDTH-1 downto 0);
+  signal addr_counter_enable, next_addr_counter_enable : std_logic;
 
 begin
 
@@ -445,7 +446,8 @@ begin
             next_dont_understand <= '1';
           else
             if API_TYP_IN = TYPE_DAT and API_PACKET_NUM_IN = c_F1 and API_DATAREADY_IN = '1' then
-              next_length <= API_DATA_IN;
+              next_length <= '0' & API_DATA_IN(14 downto 0);
+              next_addr_counter_enable <= API_DATA_IN(15);
               next_DAT_READ_ENABLE_OUT <= '1';
               next_state <= MEM_READ;
             elsif API_TYP_IN = TYPE_DAT and API_PACKET_NUM_IN = c_F0 and API_DATAREADY_IN = '1' then
@@ -480,6 +482,9 @@ begin
               next_API_DATA_OUT <= (others => '0');
               if length > 1 and API_READ_IN = '1' then
                 next_DAT_READ_ENABLE_OUT <= '1';
+                if addr_counter_enable = '1' then
+                  next_address <= address + 1;
+                end if;
               end if;
             when others => null;
           end case;
@@ -490,6 +495,9 @@ begin
             next_dont_understand <= '1';
           elsif API_PACKET_NUM_IN = c_F0 and API_TYP_IN = TYPE_DAT and API_DATAREADY_IN = '1' then
             next_address <= API_DATA_IN;
+          elsif API_PACKET_NUM_IN = c_F1 and API_TYP_IN = TYPE_DAT and API_DATAREADY_IN = '1' then
+            next_addr_counter_enable <= API_DATA_IN(15);
+          elsif API_PACKET_NUM_IN = c_F3 and API_TYP_IN = TYPE_DAT and API_DATAREADY_IN = '1' then
             next_state <= MEM_WRITE;
           end if;
 
@@ -504,17 +512,24 @@ begin
               when c_F2 =>
                 next_Reg_low <= API_DATA_IN;
                 next_DAT_WRITE_ENABLE_OUT <= '1';
+              when c_F3 =>
+                if addr_counter_enable = '1' then
+                  next_address <= address + 1;
+                end if;
               when others => null;
             end case;
             if API_TYP_IN = TYPE_TRM then
               next_state <= DAT_START_READ;
               next_DAT_READ_ENABLE_OUT <= '1';
+              next_API_SEND_OUT <= '1';
             end if;
           end if;
 
         when DAT_START_READ =>
           if DAT_DATAREADY_IN = '1' then
             next_state <= DAT_READ;
+          elsif DAT_NO_MORE_DATA_IN = '1' then
+            next_state <= SEND_REPLY_SHORT_TRANSFER;
           end if;
 
         when DAT_READ =>
@@ -552,6 +567,7 @@ begin
           buf_rom_read_addr <= "000";
           length <= (others => '0');
           dont_understand <= '0';
+          addr_counter_enable <= '0';
         else
           current_state <= next_state;
 --           HDR_F0 <= next_HDR_F0;
@@ -571,6 +587,7 @@ begin
           buf_rom_read_addr <= rom_read_addr;
           length <= next_length;
           dont_understand <= next_dont_understand;
+          addr_counter_enable <= next_addr_counter_enable;
         end if;
       end if;
     end process;