signal monitor_rx_bytes, monitor_rx_frames, monitor_tx_bytes, monitor_tx_frames : std_logic_vector(31 downto 0);
signal insert_ttype, additional_hdr : std_logic;
signal reset_dhcp : std_logic;
+signal dbg_hist, dbg_hist2 : hist_array;
+signal soft_gbe_reset, soft_rst, dhcp_done : std_logic;
+signal rst_ctr : std_logic_vector(25 downto 0);
begin
--reset_dhcp <= not GSR_N;
+
+process(CLK)
+begin
+ if rising_edge(CLK) then
+ if (GSR_N = '0') then
+ rst_ctr <= (others => '0');
+ else
+ rst_ctr <= rst_ctr + x"1";
+ end if;
+ end if;
+end process;
+
+soft_gbe_reset <= '1' when soft_rst = '1' or (dhcp_done = '0' and rst_ctr(25) = '1') else '0';
+
MAIN_CONTROL : trb_net16_gbe_main_control
port map(
CLK => CLK,
CLK_125 => serdes_clk_125,
RESET => RESET,
- RESET_FOR_DHCP => '0', --reset_dhcp,
+ RESET_FOR_DHCP => soft_gbe_reset, --'0', --reset_dhcp,
MC_LINK_OK_OUT => link_ok,
MC_RESET_LINK_IN => '0',
MC_IDLE_TOO_LONG_OUT => idle_too_long,
+ MC_DHCP_DONE_OUT => dhcp_done,
-- signals to/from receive controller
RC_FRAME_WAITING_IN => rc_frame_ready,
MONITOR_SELECT_REC_BYTES_OUT => dbg_select_rec_bytes,
MONITOR_SELECT_SENT_BYTES_OUT => dbg_select_sent_bytes,
MONITOR_SELECT_SENT_OUT => dbg_select_sent,
- MONITOR_SELECT_GEN_DBG_OUT => dbg_select_gen
+ MONITOR_SELECT_GEN_DBG_OUT => dbg_select_gen,
+
+ DATA_HIST_OUT => dbg_hist,
+ SCTRL_HIST_OUT => dbg_hist2
);
MAKE_RESET_OUT <= make_reset; -- or idle_too_long;
GBE_ALLOW_RX_OUT => allow_rx,
GBE_ADDITIONAL_HDR_OUT => additional_hdr,
GBE_INSERT_TTYPE_OUT => insert_ttype,
+ GBE_SOFT_RESET_OUT => soft_rst,
MONITOR_RX_BYTES_IN => monitor_rx_bytes,
MONITOR_RX_FRAMES_IN => monitor_rx_frames,
MONITOR_SELECT_REC_BYTES_IN => dbg_select_rec_bytes,
MONITOR_SELECT_SENT_BYTES_IN => dbg_select_sent_bytes,
MONITOR_SELECT_SENT_IN => dbg_select_sent,
- MONITOR_SELECT_GEN_DBG_IN => dbg_select_gen
+ MONITOR_SELECT_GEN_DBG_IN => dbg_select_gen,
+
+ DATA_HIST_IN => dbg_hist,
+ SCTRL_HIST_IN => dbg_hist2
);
end generate;
USE_125MHZ_EXTCLK => 0
)
port map(
- RESET => RESET,
+ RESET => soft_gbe_reset, --RESET,
GSR_N => GSR_N,
CLK_125_OUT => serdes_clk_125,
CLK_125_RX_OUT => serdes_rx_clk, --open,
USE_125MHZ_EXTCLK => 1
)
port map(
- RESET => RESET,
+ RESET => soft_gbe_reset, --RESET,
GSR_N => GSR_N,
CLK_125_OUT => serdes_clk_125,
CLK_125_RX_OUT => serdes_rx_clk,
--***********************
+
+
-- gk 04.08.10
MON_PROC : process(CLK)
begin
MC_LINK_OK_OUT : out std_logic;
MC_RESET_LINK_IN : in std_logic;
MC_IDLE_TOO_LONG_OUT : out std_logic;
+ MC_DHCP_DONE_OUT : out std_logic;
-- signals to/from receive controller
RC_FRAME_WAITING_IN : in std_logic;
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0)
+ MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
+
+ DATA_HIST_OUT : out hist_array;
+ SCTRL_HIST_OUT : out hist_array
);
end trb_net16_gbe_main_control;
MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT,
MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT,
MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT,
- MONITOR_SELECT_GEN_DBG_OUT => MONITOR_SELECT_GEN_DBG_OUT
+ MONITOR_SELECT_GEN_DBG_OUT => MONITOR_SELECT_GEN_DBG_OUT,
+
+ DATA_HIST_OUT => DATA_HIST_OUT,
+ SCTRL_HIST_OUT => SCTRL_HIST_OUT
);
TC_DATA_OUT <= tc_data;
end case;
end process LINK_STATE_MACHINE;
+MC_DHCP_DONE_OUT <= '1' when link_current_state = ACTIVE else '0';
+
LINK_OK_CTR_PROC : process(CLK)
begin
if rising_edge(CLK) then
constructNextState <= WAIT_FOR_LOAD;
end if;
when others =>
- constr_state <= x"4";
+ constr_state <= x"f";
constructNextState <= CIDLE;
end case;
end process constructMachine;
begin
case loadCurrentState is
when LIDLE =>
- load_state <= x"0";
+ load_state <= x"1";
if ((constructCurrentState = WAIT_FOR_LOAD) and (df_empty = '0')) then
loadNextState <= WAIT_FOR_FC;
else
loadNextState <= LIDLE;
end if;
when WAIT_FOR_FC =>
- load_state <= x"1";
+ load_state <= x"2";
if (TC_H_READY_IN = '1') then
loadNextState <= PUT_Q_LEN;
else
loadNextState <= WAIT_FOR_FC;
end if;
when PUT_Q_LEN =>
- load_state <= x"2";
+ load_state <= x"3";
if (all_int_ctr = 3) then
loadNextState <= PUT_Q_DEC;
else
loadNextState <= PUT_Q_LEN;
end if;
when PUT_Q_DEC =>
- load_state <= x"3";
+ load_state <= x"4";
if (all_int_ctr = 3) then
loadNextState <= LOAD_SUB;
else
loadNextState <= PUT_Q_DEC;
end if;
when LOAD_SUB =>
- load_state <= x"4";
+ load_state <= x"5";
if (bytes_loaded = max_frame_size - 1) then
loadNextState <= DIVIDE;
elsif (all_int_ctr = 15) then
loadNextState <= LOAD_SUB;
end if;
when PREP_DATA =>
- load_state <= x"5";
+ load_state <= x"6";
loadNextState <= LOAD_DATA;
when LOAD_DATA =>
- load_state <= x"6";
+ load_state <= x"7";
-- if (bytes_loaded = max_frame_size - 1) then
-- loadNextState <= DIVIDE;
-- -- gk 07.10.10
loadNextState <= LOAD_DATA;
end if;
when DIVIDE =>
- load_state <= x"7";
+ load_state <= x"8";
if (TC_H_READY_IN = '1') then
if (divide_position = "00") then
loadNextState <= PREP_DATA;
loadNextState <= DIVIDE;
end if;
when LOAD_TERM =>
- load_state <= x"8";
+ load_state <= x"9";
if (bytes_loaded = max_frame_size - 1) and (all_int_ctr /= 31) then
loadNextState <= DIVIDE;
elsif (all_int_ctr = 31) then
end if;
-- gk 28.04.10
when CLEANUP =>
- load_state <= x"9";
+ load_state <= x"a";
if (PC_DELAY_IN = x"0000_0000") then
loadNextState <= LIDLE;
else
end if;
-- gk 28.04.10
when DELAY =>
- load_state <= x"a";
+ load_state <= x"b";
if (delay_ctr = x"0000_0000") then
loadNextState <= LIDLE;
else
begin
case saveSubCurrentState is
when SIDLE =>
- save_state <= x"0";
+ save_state <= x"1";
if (PC_START_OF_SUB_IN = '1') then
saveSubNextState <= SAVE_SIZE;
-- this branch is dangerous!
saveSubNextState <= SIDLE;
end if;
when SAVE_SIZE =>
- save_state <= x"1";
+ save_state <= x"2";
if (sub_int_ctr = 3) then
saveSubNextState <= SAVE_DECODING;
else
saveSubNextState <= SAVE_SIZE;
end if;
when SAVE_DECODING =>
- save_state <= x"2";
+ save_state <= x"3";
if (sub_int_ctr = 3) then
saveSubNextState <= SAVE_ID;
else
saveSubNextState <= SAVE_DECODING;
end if;
when SAVE_ID =>
- save_state <= x"3";
+ save_state <= x"4";
if (sub_int_ctr = 3) then
saveSubNextState <= SAVE_TRIG_NR;
else
saveSubNextState <= SAVE_ID;
end if;
when SAVE_TRIG_NR =>
- save_state <= x"4";
+ save_state <= x"5";
if (sub_int_ctr = 3) then
saveSubNextState <= SIDLE;
else
saveSubNextState <= SAVE_TRIG_NR;
end if;
when SAVE_TERM =>
- save_state <= x"5";
+ save_state <= x"6";
if (sub_int_ctr = 31) then
saveSubNextState <= SIDLE;
else
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0)
+ MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
+
+ DATA_HIST_OUT : out hist_array;
+ SCTRL_HIST_OUT : out hist_array
);
end trb_net16_gbe_protocol_selector;
MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT(3 * 32 - 1 downto 2 * 32),
MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
- MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(3 * 32 - 1 downto 2 * 32)
+ MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(3 * 32 - 1 downto 2 * 32),
+
+ DATA_HIST_OUT => SCTRL_HIST_OUT
);
TrbNetData : trb_net16_gbe_response_constructor_TrbNetData
MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT(4 * 32 - 1 downto 3 * 32),
MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT(4 * 32 - 1 downto 3 * 32),
MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(4 * 32 - 1 downto 3 * 32),
- MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(4 * 32 - 1 downto 3 * 32)
+ MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(4 * 32 - 1 downto 3 * 32),
+
+ DATA_HIST_OUT => DATA_HIST_OUT
);
--stat_gen : if g_SIMULATE = 0 generate
MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0)
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+
+ DATA_HIST_OUT : out hist_array
);
end entity trb_net16_gbe_response_constructor_SCTRL;
attribute syn_keep of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;
attribute syn_preserve of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;
+signal hist_inst : hist_array;
+signal reset_all_hist : std_logic_vector(31 downto 0);
begin
-- monitoring
+hist_ctrs_gen : for i in 0 to 31 generate
+
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') then
+ reset_all_hist(i) <= '1';
+ elsif (hist_inst(i) = x"ffff_ffff") then
+ reset_all_hist(i) <= '1';
+ else
+ reset_all_hist(i) <= '0';
+ end if;
+ end if;
+ end process;
+
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (reset_all_hist /= x"0000_0000") then
+ hist_inst(i) <= (others => '0');
+ elsif (dissect_current_state = LOAD_FRAME and tx_loaded_ctr = tx_data_ctr and i = to_integer(unsigned(tx_data_ctr(15 downto 11)))) then
+ hist_inst(i) <= hist_inst(i) + x"1";
+ else
+ hist_inst(i) <= hist_inst(i);
+ end if;
+ end if;
+ end process;
+
+end generate hist_ctrs_gen;
+
+DATA_HIST_OUT <= hist_inst;
-DEBUG_OUT(0) <= rx_full;
-DEBUG_OUT(1) <= rx_empty;
-DEBUG_OUT(2) <= tx_full;
-DEBUG_OUT(3) <= tx_empty;
-DEBUG_OUT(7 downto 4) <= state;
+process(CLK)
+begin
+ if rising_edge(CLK) then
+ DEBUG_OUT(0) <= rx_full;
+ DEBUG_OUT(1) <= rx_empty;
+ DEBUG_OUT(2) <= tx_full;
+ DEBUG_OUT(3) <= tx_empty;
+ DEBUG_OUT(7 downto 4) <= state;
+ end if;
+end process;
DEBUG_OUT(63 downto 8) <= (others => '0');
MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0)
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+
+ DATA_HIST_OUT : out hist_array
);
end trb_net16_gbe_response_constructor_TrbNetData;
signal ipu_dbg : std_logic_vector(383 downto 0);
signal constr_dbg : std_logic_vector(63 downto 0);
+signal hist_inst : hist_array;
+signal tc_sod_flag : std_logic;
+signal reset_all_hist : std_logic_vector(31 downto 0);
begin
end process SENT_PACKETS_PROC;
-- monitoring
+
+
+process(CLK)
+begin
+ if rising_edge(CLK) then
+ if (tc_sod = '1' and tc_sod_flag = '0') then
+ tc_sod_flag <= '1';
+ elsif (tc_sod = '0') then
+ tc_sod_flag <= '0';
+ else
+ tc_sod_flag <= tc_sod_flag;
+ end if;
+ end if;
+end process;
+
+hist_ctrs_gen : for i in 0 to 31 generate
+
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') then
+ reset_all_hist(i) <= '1';
+ elsif (hist_inst(i) = x"ffff_ffff") then
+ reset_all_hist(i) <= '1';
+ else
+ reset_all_hist(i) <= '0';
+ end if;
+ end if;
+ end process;
+
+ HIST_PROC : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') or (reset_all_hist /= x"0000_0000") then
+ hist_inst(i) <= (others => '0');
+ elsif (tc_sod = '1' and tc_sod_flag = '0' and i = to_integer(unsigned(event_bytes(15 downto 11)))) then
+ hist_inst(i) <= hist_inst(i) + x"1";
+ else
+ hist_inst(i) <= hist_inst(i);
+ end if;
+ end if;
+ end process;
+end generate hist_ctrs_gen;
+
+DATA_HIST_OUT <= hist_inst;
+
process(CLK)
begin
if rising_edge(CLK) then
end if;
end if;
end process;
+
MONITOR_SELECT_SENT_BYTES_OUT <= mon_sent_bytes;
GBE_ALLOW_RX_OUT : out std_logic;
GBE_ADDITIONAL_HDR_OUT : out std_logic;
GBE_INSERT_TTYPE_OUT : out std_logic;
+ GBE_SOFT_RESET_OUT : out std_logic;
MONITOR_RX_BYTES_IN : in std_logic_vector(31 downto 0);
MONITOR_RX_FRAMES_IN : in std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_IN : in std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_IN : in std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_IN : in std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_IN : in std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0)
+ MONITOR_SELECT_GEN_DBG_IN : in std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
+
+ DATA_HIST_IN : in hist_array;
+ SCTRL_HIST_IN : in hist_array
);
end entity;
allow_rx <= '1';
insert_ttype <= '0';
additional_hdr <= '1';
+ GBE_SOFT_RESET_OUT <= '0';
elsif (BUS_WRITE_EN_IN = '1') then
+
+ GBE_SOFT_RESET_OUT <= '0';
+
case BUS_ADDR_IN is
when x"00" =>
when x"ff" =>
if (BUS_DATA_IN = x"ffff_ffff") then
- reset_values <= '1';
+ reset_values <= '0';
+ GBE_SOFT_RESET_OUT <= '1';
else
reset_values <= '0';
+ GBE_SOFT_RESET_OUT <= '0';
end if;
when others =>
else
reset_values <= '0';
readout_ctr_valid <= '0';
+ GBE_SOFT_RESET_OUT <= '0';
end if;
end if;
end process WRITE_PROC;
READ_PROC : process(CLK)
+ variable address : integer;
begin
if rising_edge(CLK) then
if (RESET = '1') then
data_out <= (others => '0');
elsif (BUS_READ_EN_IN = '1') then
- case BUS_ADDR_IN is
+
+ address := to_integer(unsigned(BUS_ADDR_IN));
+
+ case address is
- when x"00" =>
+ when 0 =>
data_out <= subevent_id;
- when x"01" =>
+ when 1 =>
data_out <= subevent_dec;
- when x"02" =>
+ when 2 =>
data_out <= queue_dec;
- when x"04" =>
+ when 4 =>
data_out(15 downto 0) <= max_frame;
data_out(31 downto 16) <= (others => '0');
- when x"05" =>
+ when 5 =>
if (use_gbe = '0') then
data_out <= x"0000_0000";
else
data_out <= x"0000_0001";
end if;
- when x"06" =>
+ when 6 =>
if (use_trbnet = '0') then
data_out <= x"0000_0000";
else
data_out <= x"0000_0001";
end if;
- when x"07" =>
+ when 7 =>
if (use_multievents = '0') then
data_out <= x"0000_0000";
else
data_out <= x"0000_0001";
end if;
- when x"09" =>
+ when 9 =>
data_out(0) <= allow_rx;
data_out(31 downto 1) <= (others => '0');
- when x"0a" =>
+ when 10 =>
data_out(0) <= additional_hdr;
data_out(31 downto 1) <= (others => '0');
- when x"0b" =>
+ when 11 =>
data_out(0) <= insert_ttype;
data_out(31 downto 1) <= (others => '0');
- when x"e0" =>
+ -- Histogram of sctrl data sizes
+ when 96 to 127 =>
+ data_out <= SCTRL_HIST_IN(address - 96);
+
+ -- Histogram of TrbNetData data sizes
+ when 128 to 159 =>
+ data_out <= DATA_HIST_IN(address - 128);
+
+ -- General statistics
+ when 224 =>
data_out <= MONITOR_RX_BYTES_IN;
- when x"e1" =>
+ when 225 =>
data_out <= MONITOR_RX_FRAMES_IN;
- when x"e2" =>
+ when 226 =>
data_out <= MONITOR_TX_BYTES_IN;
- when x"e3" =>
+ when 227 =>
data_out <= MONITOR_TX_FRAMES_IN;
- when x"e4" =>
+ when 228 =>
data_out <= MONITOR_TX_PACKETS_IN;
- when x"e5" =>
+ when 229 =>
data_out <= MONITOR_DROPPED_IN;
-- Sctrl
- when x"a0" =>
+ when 160 =>
data_out <= MONITOR_SELECT_REC_IN(3 * 32 - 1 downto 2 * 32);
- when x"a1" =>
+ when 161 =>
data_out <= MONITOR_SELECT_REC_BYTES_IN(3 * 32 - 1 downto 2 * 32);
- when x"a2" =>
+ when 162 =>
data_out <= MONITOR_SELECT_SENT_IN(3 * 32 - 1 downto 2 * 32);
- when x"a3" =>
+ when 163 =>
data_out <= MONITOR_SELECT_SENT_BYTES_IN(3 * 32 - 1 downto 2 * 32);
- when x"a4" =>
+ when 164 =>
data_out <= MONITOR_SELECT_GEN_DBG_IN(3 * 64 - 1 - 32 downto 2 * 64);
- when x"a5" =>
+ when 165 =>
data_out <= MONITOR_SELECT_GEN_DBG_IN(3 * 64 - 1 downto 2 * 64 + 32);
-- TrbnetData
- when x"b0" =>
+ when 176 =>
data_out <= MONITOR_SELECT_REC_IN(4 * 32 - 1 downto 3 * 32);
- when x"b1" =>
+ when 177 =>
data_out <= MONITOR_SELECT_REC_BYTES_IN(4 * 32 - 1 downto 3 * 32);
- when x"b2" =>
+ when 178 =>
data_out <= MONITOR_SELECT_SENT_IN(4 * 32 - 1 downto 3 * 32);
- when x"b3" =>
+ when 179 =>
data_out <= MONITOR_SELECT_SENT_BYTES_IN(4 * 32 - 1 downto 3 * 32);
- when x"b4" =>
+ when 180 =>
data_out <= MONITOR_SELECT_GEN_DBG_IN(4 * 64 - 1 - 32 downto 3 * 64);
- when x"b5" =>
+ when 181 =>
data_out <= MONITOR_SELECT_GEN_DBG_IN(4 * 64 - 1 downto 3 * 64 + 32);
-- for older network monitors
- when x"f3" =>
+ when 243 =>
data_out <= MONITOR_TX_BYTES_IN;
- when x"f4" =>
+ when 244 =>
data_out <= MONITOR_TX_FRAMES_IN;
when others =>
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0)
+ MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
+
+ DATA_HIST_OUT : out hist_array;
+ SCTRL_HIST_OUT : out hist_array
);
end component;
MC_LINK_OK_OUT : out std_logic;
MC_RESET_LINK_IN : in std_logic;
MC_IDLE_TOO_LONG_OUT : out std_logic;
+ MC_DHCP_DONE_OUT : out std_logic;
-- signals to/from receive controller
RC_FRAME_WAITING_IN : in std_logic;
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0)
+ MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
+
+ DATA_HIST_OUT : out hist_array;
+ SCTRL_HIST_OUT : out hist_array
);
end component;
GBE_ALLOW_RX_OUT : out std_logic;
GBE_ADDITIONAL_HDR_OUT : out std_logic;
GBE_INSERT_TTYPE_OUT : out std_logic;
+ GBE_SOFT_RESET_OUT : out std_logic;
MONITOR_RX_BYTES_IN : in std_logic_vector(31 downto 0);
MONITOR_RX_FRAMES_IN : in std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_IN : in std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_BYTES_IN : in std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
MONITOR_SELECT_SENT_IN : in std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_IN : in std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0)
+ MONITOR_SELECT_GEN_DBG_IN : in std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
+
+ DATA_HIST_IN : in hist_array;
+ SCTRL_HIST_IN : in hist_array
);
end component;
package trb_net_gbe_protocols is
+type hist_array is array(31 downto 0) of std_logic_vector(31 downto 0);
+
signal g_SIMULATE : integer range 0 to 1 := 0;
-- g_MY_IP is being set by DHCP Response Constructor
MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0)
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+
+ DATA_HIST_OUT : out hist_array
);
end component;
MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0)
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+
+ DATA_HIST_OUT : out hist_array
);
end component;
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