modified for the GeneralPorpose AddOn

diff --git a/trb3/GPAddOn.tex b/trb3/GPAddOn.tex
new file mode 100644 (file)
index 0000000..89dfbeb
--- /dev/null
+++ b/trb3/GPAddOn.tex
@@ -0,0 +1,12 @@
+
+
+\begin{itemize*}
+ \item Schematics \href{http://hades-wiki.gsi.de/pub/DaqSlowControl/TDCReadoutBoardV3/GPIN_AddOn1_alles.pdf}{GPIN\_AddOn1\_alles.pdf}
+% \item Pin-out file for the FPGA \href{will be added}{will be added soon}
+\end{itemize*}
+
+
+%%% Local Variables: 
+%%% mode: latex
+%%% TeX-master: t
+%%% End: 

diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex
index ed036c58c24b67c9e0d297f6b3a3a3da5abb099a..f330884b1984cda9ce58dff8c3540155d8a62e9b 100644 (file)
--- a/trb3/Trb3GeneralRemarks.tex
+++ b/trb3/Trb3GeneralRemarks.tex
@@ -78,6 +78,7 @@ The lower 16 Bit are used to identify the contents of the design and the AddOn b
   \item[2XXX]  use with multipurpose test AddOn
   \item[3XXX]  use with SFP hub AddOn
   \item[4XXX]  use with Padiwa adapter AddOn
+  \item[5XXX]  use with General Purpose AddOn - with NIM connectors
   \item[8XXX]  uses RX clock as main internal clock
   \item[X0nX]  contains $2^n$ TDC channels, single edge
   \item[X1nX]  contains $2^n$ TDC channels, double edge

diff --git a/trb3/main.tex b/trb3/main.tex
index cd6967836ddb873290b25e5afe53df7358ba2454..66a61f5d38ebc473a54cbc769e455f2eb42a701c 100644 (file)
--- a/trb3/main.tex
+++ b/trb3/main.tex
@@ -153,6 +153,8 @@
       \input{MvdAddOn}
     \subsection{CTS AddOn}
       \input{CtsAddOn}
+    \subsection{General Purpose AddOn}
+      \input{GPAddOn}
     \subsection{Padiwa}
       \input{WasaFrontend}