added bugreport about precision degradation if the temperature it <30°C, mt

diff --git a/trb3/Trb3KnownBugs.tex b/trb3/Trb3KnownBugs.tex
index f5063f6fe4a4b72f82c716305cb848e5344d43e5..5ee5280870380bb37f32081e8b84f4d095e8a515 100644 (file)
--- a/trb3/Trb3KnownBugs.tex
+++ b/trb3/Trb3KnownBugs.tex
@@ -9,5 +9,20 @@
 \item    Both GPLL inputs to peripheral FPGA are not usable - they are connected to Feedback input instead of normal input of PLL. They can still be used through normal routing, but source synchronous operation is not possible.
 \item    The JTAG Connector is wrong. The line labelled TDI is TDO and vice versa. 
 \item    The 48V-to-6V converter gets quite hot without air-flow. When AddOns are mounted, the fan must be installed on the short side of the TRB, not on the long one.
+
 \end{itemize*}
 
+\section{TRB3/TRB3sc Temperature Effect}
+
+We observed that the time precision of the FPGA-TDC in the ECP3 FPGAs (on TRB3
+and TRB3sc) degrades dramatically (from the well known <20ps RMS to up to
+~200ps RMS) if the FPGA temperature decreases below roughly 30°C.
+This effect is completely not understood and no workaround except keeping the
+FPGA temperature high enough is known.
+
+This effect is not seen on any board with the ECP5 FPGA (tested by cooling
+down 50 FPGAs on the TRB5sc-boards).
+
+
+
+