slow control reset of counters.

diff --git a/mupix/Mupix8/sources/LinkSynchronizer.vhd b/mupix/Mupix8/sources/LinkSynchronizer.vhd
index 43f9435a915ad2e4117d96e1db9d6c4dbd463d42..e8cc29622f8445402dd988c9a58e6b674aef68e1 100644 (file)
--- a/mupix/Mupix8/sources/LinkSynchronizer.vhd
+++ b/mupix/Mupix8/sources/LinkSynchronizer.vhd
@@ -14,6 +14,7 @@ entity LinkSynchronizer is
   port (
     clk_in             : in  std_logic;  -- clk in synchronous to serdes rx clock
     reset_in           : in  std_logic;  -- reset
+    reset_counter      : in  std_logic;  -- reset for comma counter
     comma_in           : in  std_logic;  -- comma word detected by serdes
     cverr_in           : in  std_logic;  -- serdes data error in
     link_sync_out      : out std_logic;  -- realign to link out pulse low to high to start word alignminment
@@ -57,7 +58,7 @@ begin  -- architecture rtl
       COUNTWIDTH => 32)
     port map (
       clk     => clk_in,
-      reset   => reset_in,
+      reset   => reset_counter,
       inc_en  => inc_en_i,
       counter => comma_counter_gray);
 
@@ -89,6 +90,9 @@ begin  -- architecture rtl
       else
         link_sync_i <= '1';
         -- look for incoming comma characters
+        if reset_counter = '1' then
+          comma_counter <= 0;
+        end if;
         if comma_in = '1' and cverr_in = '0' then
           comma_seen    <= '1';
           comma_counter <= comma_counter + 1;

diff --git a/mupix/Mupix8/sources/MuPixDataLink_new.vhd b/mupix/Mupix8/sources/MuPixDataLink_new.vhd
index 80032e537999515129f63f48112e9e53d135e0da..cbdaafa8de0ec927112d6d0614bc493bc0e36bd1 100644 (file)
--- a/mupix/Mupix8/sources/MuPixDataLink_new.vhd
+++ b/mupix/Mupix8/sources/MuPixDataLink_new.vhd
@@ -215,6 +215,7 @@ architecture rtl of MupixDataLinkWithUnpacker is
     port(
       clk               : in  std_logic;
       reset             : in  std_logic;
+      reset_counter     : in  std_logic;
       data_in           : in  std_logic_vector(7 downto 0);
       komma             : in  std_logic;
       valid             : in  std_logic;
@@ -233,6 +234,7 @@ architecture rtl of MupixDataLinkWithUnpacker is
     port (
       clk_in             : in  std_logic;
       reset_in           : in  std_logic;
+      reset_counter      : in  std_logic;
       comma_in           : in  std_logic;
       cverr_in           : in  std_logic;
       link_sync_out      : out std_logic;
@@ -483,7 +485,6 @@ begin
                 sync_output => rx_data_sync((i + 1)*8 - 1 downto i*8));
   end generate rx_data_gen;
 
-
   -- synchronize status signals into trb clock domain
   sync_los_low : InputSynchronizer
     generic map(depth => 2, width => 4)
@@ -501,6 +502,7 @@ begin
       port map (
         clk_in             => clkrx(j),
         reset_in           => rst,
+        reset_counter      => reset_counters_i,
         comma_in           => rx_komma_sync(j),
         cverr_in           => rx_dataerror_sync(j),
         link_sync_out      => align_en_i(j),
@@ -519,6 +521,7 @@ begin
       port map (
         clk               => clkrx(j),
         reset             => rst,
+        reset_counter     => reset_counters_i,
         data_in           => rx_data_sync((j + 1)*8 - 1 downto j*8),
         komma             => rx_komma_sync(j),
         valid             => unpacker_valid_i(j),
@@ -584,7 +587,6 @@ begin
         slv_ack_out          <= '0';
         slv_no_more_data_out <= '0';
         slv_unknown_addr_out <= '0';
-        reset_counters_i     <= '0';
         reset_quad_i         <= '0';
         reset_fifos_i        <= '0';
         if slv_write_in = '1' then

diff --git a/mupix/Mupix8/sources/MuPixUnpacker.vhd b/mupix/Mupix8/sources/MuPixUnpacker.vhd
index d4df0a337201c26982d475d9758176e15f09656f..6ce33e1d003ed4d4be25dc45ca4e8e712125640d 100644 (file)
--- a/mupix/Mupix8/sources/MuPixUnpacker.vhd
+++ b/mupix/Mupix8/sources/MuPixUnpacker.vhd
@@ -17,6 +17,7 @@ entity MupixUnpacker is
   port(
     clk               : in  std_logic;  -- clk input
     reset             : in  std_logic;  -- reset input
+    reset_counter     : in  std_logic;  -- reset error counter
     data_in           : in  std_logic_vector(7 downto 0);  -- 10b8b decoded data
     komma             : in  std_logic;  -- komma word indicator
     valid             : in  std_logic;  -- incoming data valid
@@ -65,7 +66,7 @@ begin
       COUNTWIDTH => 32)
     port map (
       clk     => clk,
-      reset   => reset,
+      reset   => reset_counter,
       inc_en  => inc_en_i,
       counter => errorcounter_gray);
 
@@ -92,6 +93,10 @@ begin
         counter_seen <= '0';
         data_mode    <= '0';
       else
+        if reset_counter = '1' then
+          errorcounter_i <= (others => '0');
+        end if;
+
         link_flag_reg  <= '0';
         coarse_reg     <= '0';
         hit_reg        <= '0';