LOCATE COMP "CLK_EXT" SITE "C14"; #external
DEFINE PORT GROUP "CLK_group"
"CLK_CM_*"
-"CLK_EXT"
+#"CLK_EXT"
"CLK_OSC";
IOBUF GROUP "CLK_group" IO_TYPE=LVDS25 DIFFRESISTOR=100;
+IOBUF PORT "CLK_EXT" IO_TYPE=LVDS25;
+
#################################################################
# Clock Manager
#################################################################
LOCATE COMP "INPUT_30" SITE "V6";
LOCATE COMP "INPUT_31" SITE "T1";
LOCATE COMP "INPUT_32" SITE "M4";
-DEFINE PORT GROUP "INPUT_group" "INPUT*" ;
-IOBUF GROUP "INPUT_group" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+#DEFINE PORT GROUP "INPUT_group" "INPUT*" ;
+#IOBUF GROUP "INPUT_group" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+
+IOBUF PORT "INPUT_1" IO_TYPE=LVDS25; # diff resistor can't be placed
+IOBUF PORT "INPUT_2" IO_TYPE=LVDS25; # diff resistor can't be placed
+IOBUF PORT "INPUT_3" IO_TYPE=LVDS25; # diff resistor can't be placed
+IOBUF PORT "INPUT_4" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_5" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_6" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_7" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_8" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_9" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_10" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_11" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_12" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_13" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_14" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_15" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_16" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_17" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_18" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_19" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_20" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_21" IO_TYPE=LVDS25; # diff resistor can't be placed
+IOBUF PORT "INPUT_22" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_23" IO_TYPE=LVDS25; # diff resistor can't be placed
+IOBUF PORT "INPUT_24" IO_TYPE=LVDS25; # diff resistor can't be placed
+IOBUF PORT "INPUT_25" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_26" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_27" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_28" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_29" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_30" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_31" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+IOBUF PORT "INPUT_32" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;
+
#################################################################
# SFP
# Other I/O
#################################################################
LOCATE COMP "SPARE_LINE_0" SITE "E13";
+IOBUF PORT "SPARE_LINE_0" IO_TYPE=LVDS25;
LOCATE COMP "SPARE_LINE_1" SITE "L21";
+IOBUF PORT "SPARE_LINE_1" IO_TYPE=LVDS25 DIFFRESISTOR=100;
LOCATE COMP "SPARE_LINE_2" SITE "P5";
-DEFINE PORT GROUP "SPARE_LINE_group" "SPARE_LINE*" ;
-IOBUF GROUP "SPARE_LINE_group" IO_TYPE=LVDS25 DIFFRESISTOR=100;
+IOBUF PORT "SPARE_LINE_2" IO_TYPE=LVDS25 DIFFRESISTOR=100;
+
+#DEFINE PORT GROUP "SPARE_LINE_group" "SPARE_LINE*" ;
+#IOBUF GROUP "SPARE_LINE_group" IO_TYPE=LVDS25 DIFFRESISTOR=100;
LOCATE COMP "LVDS_1" SITE "J23";
LOCATE COMP "LVDS_2" SITE "G26";
attribute syn_useioff of FLASH_DIN : signal is true;
attribute syn_useioff of FLASH_DOUT : signal is true;
attribute syn_useioff of TEST_LINE : signal is true;
- attribute syn_useioff of SPARE_LINE : signal is false; --true;
+ attribute syn_useioff of SPARE_LINE : signal is true;
attribute syn_useioff of LVDS : signal is true;
attribute syn_useioff of OR_IN : signal is true;
---------------------------------------------------------------------------
-- Endpoint
---------------------------------------------------------------------------
+ --regio_hardware_version_i <= x"9100" & addOn_type_i & edge_type_i & tdc_channel_no_i & x"0";
+
+ --addOn_type_i <= x"0"; -- x"0" - ADA AddOn version 1
+ -- -- x"1" - ADA AddOn version 2
+ -- -- x"2" - multi purpose test AddOn
+ -- -- x"3" - SFP hub AddOn
+ -- -- x"4" - Wasa AddOn
+ --edge_type_i <= x"0"; -- x"0" - single edge
+ -- -- x"1" - double edge
+ -- -- x"8" - double edge on consecutive channels
+ --tdc_channel_no_i <= x"6"; -- 2^n channels
+
THE_ENDPOINT : trb_net16_endpoint_hades_full_handler
generic map(
REGIO_NUM_STAT_REGS => REGIO_NUM_STAT_REGS, --4, --16 stat reg
BROADCAST_BITMASK => x"FF",
BROADCAST_SPECIAL_ADDR => x"50",
REGIO_COMPILE_TIME => std_logic_vector(to_unsigned(VERSION_NUMBER_TIME, 32)),
- REGIO_HARDWARE_VERSION => x"92000000",
+ REGIO_HARDWARE_VERSION => x"92000860",
REGIO_INIT_ADDRESS => x"f300",
REGIO_USE_VAR_ENDPOINT_ID => c_YES,
CLOCK_FREQUENCY => 100,
generic map(
PORT_NUMBER => 9,
PORT_ADDRESSES => (0 => x"d000", 1 => x"d100", 2 => x"d400", 3 => x"c000", 4 => x"c100", 5 => x"c200", 6 => x"c300", 7 => x"c400", 8 => x"c800", others => x"0000"),
- PORT_ADDR_MASK => (0 => 1, 1 => 6, 2 => 5, 3 => 7, 4 => 5, 5 => 7, 6 => 7, others => 0)
+ PORT_ADDR_MASK => (0 => 1, 1 => 6, 2 => 5, 3 => 7, 4 => 5, 5 => 7, 6 => 7, 7 => 7, 8 => 3, others => 0)
)
port map(
CLK => clk_100_i,
-------------------------------------------------------------------------------
THE_TDC : TDC
generic map (
- CHANNEL_NUMBER => 5, -- Number of TDC channels
+ CHANNEL_NUMBER => 33, -- Number of TDC channels
CONTROL_REG_NR => 5, -- Number of control regs
TDC_VERSION => "001" & x"51") -- TDC version numberTDC_VERSION => "001" & x"51") -- TDC version number
port map (
RESET => reset_i,
- CLK_TDC => CLK_OSC, -- Clock used for the time measurement
+-- CLK_TDC => CLK_OSC, -- Oscillator used for the time measurement
+ CLK_TDC => CLK_EXT, -- External Clock used for the time measurement
CLK_READOUT => clk_100_i, -- Clock for the readout
REFERENCE_TIME => timing_trg_received_i, -- Reference time input
- HIT_IN => hit_in_i(4 downto 1), -- Channel start signals
+ HIT_IN => hit_in_i(32 downto 1), -- Channel start signals
HIT_CALIBRATION => clk_20_i, -- Hits for calibrating the TDC
TRG_WIN_PRE => tdc_ctrl_reg(42 downto 32), -- Pre-Trigger window width
TRG_WIN_POST => tdc_ctrl_reg(58 downto 48), -- Post-Trigger window width
-- hit_in_i <= INPUT;
-- to detect rising & falling edges
- --Gen_Hit_In_Signals : for i in 1 to 32 generate
- -- hit_in_i(i*2-1) <= INPUT(i);
- -- hit_in_i(i*2) <= not INPUT(i);
- --end generate Gen_Hit_In_Signals;
-
- Gen_Hit_In_Signals : for i in 1 to 2 generate
- hit_in_i(i*2-1) <= SPARE_LINE(i);
- hit_in_i(i*2) <= not SPARE_LINE(i);
+ Gen_Hit_In_Signals : for i in 1 to 32 generate
+ hit_in_i(i*2-1) <= INPUT(i);
+ hit_in_i(i*2) <= not INPUT(i);
end generate Gen_Hit_In_Signals;
+ --Gen_Hit_In_Signals : for i in 1 to 2 generate
+ -- hit_in_i(i*2-1) <= SPARE_LINE(i);
+ -- hit_in_i(i*2) <= not SPARE_LINE(i);
+ --end generate Gen_Hit_In_Signals;
+
end architecture;