ADC: Keeping the ADC SPI pins low (also PULLMODE=DOWN), prevent entering power on...

diff --git a/ADC/trb3_periph_adc.vhd b/ADC/trb3_periph_adc.vhd
index a1d3b8a848993d702325cbe11e6b868371e84bec..b27583a30780cc3fac97aff5058f74da8ba6ff4a 100644 (file)
--- a/ADC/trb3_periph_adc.vhd
+++ b/ADC/trb3_periph_adc.vhd
@@ -585,7 +585,7 @@ THE_SPI_RELOAD : entity work.spi_flash_and_fpga_reload
   FPGA_SDI(0) <= spi_SDO     when spi_CS(2 downto 0) /= b"111" else '0';
   spi_SDI     <= FPGA_SDO(0) when spi_CS(2 downto 0) /= b"111" else '0';
   
-  SPI_ADC_SCK         <= spi_SCK when spi_CS(3) = '0' else '1';
+  SPI_ADC_SCK         <= spi_SCK when spi_CS(3) = '0' else '0';
   SPI_ADC_SDIO        <= spi_SDO when spi_CS(3) = '0' else '0';
   
   LMK_CLK             <= spi_SCK when spi_CS(5 downto 4) /= b"11" else '1' ;