CLK_125_IN : in std_logic;
RESET : in std_logic;
GSR_N : in std_logic;
-
- SD_RXD_P_IN : in std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
- SD_RXD_N_IN : in std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
- SD_TXD_P_OUT : out std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
- SD_TXD_N_OUT : out std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
+
SD_PRSNT_N_IN : in std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
SD_LOS_IN : in std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0); -- SFP Loss Of Signal ('0' = OK, '1' = no signal)
SD_TXDIS_OUT : out std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0); -- SFP disable
GSC_REPLY_PACKET_NUM_IN : in std_logic_vector(2 downto 0);
GSC_REPLY_READ_OUT : out std_logic;
GSC_BUSY_IN : in std_logic;
- -- IP configuration
- SLV_ADDR_IN : in std_logic_vector(7 downto 0);
- SLV_READ_IN : in std_logic;
- SLV_WRITE_IN : in std_logic;
- SLV_BUSY_OUT : out std_logic;
- SLV_ACK_OUT : out std_logic;
- SLV_DATA_IN : in std_logic_vector(31 downto 0);
- SLV_DATA_OUT : out std_logic_vector(31 downto 0);
- -- Registers config
- BUS_ADDR_IN : in std_logic_vector(7 downto 0);
- BUS_DATA_IN : in std_logic_vector(31 downto 0);
- BUS_DATA_OUT : out std_logic_vector(31 downto 0);
- BUS_WRITE_EN_IN : in std_logic;
- BUS_READ_EN_IN : in std_logic;
- BUS_ACK_OUT : out std_logic;
+ -- IP configuration
+ BUS_IP_RX : in CTRLBUS_RX;
+ BUS_IP_TX : out CTRLBUS_TX;
+ -- Registers config
+ BUS_REG_RX : in CTRLBUS_RX;
+ BUS_REG_TX : out CTRLBUS_TX;
MAKE_RESET_OUT : out std_logic;
signal make_reset0, make_reset1, make_reset2, make_reset3 : std_logic := '0';
signal monitor_gen_dbg : std_logic_vector(c_MAX_PROTOCOLS * 64 - 1 downto 0);
+ signal SD_RXD_P_IN,SD_RXD_N_IN,SD_TXD_P_OUT,SD_TXD_N_OUT : std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
+ attribute nopad : string;
+ attribute nopad of SD_RXD_P_IN,SD_RXD_N_IN,SD_TXD_P_OUT,SD_TXD_N_OUT : signal is "true";
+
begin
mac_impl_gen : if DO_SIMULATION = 0 generate
GSC_REPLY_PACKET_NUM_IN => mlt_gsc_reply_packet(4 * 3 - 1 downto 3 * 3),
GSC_REPLY_READ_OUT => mlt_gsc_reply_read(3),
GSC_BUSY_IN => mlt_gsc_busy(3),
- SLV_ADDR_IN => SLV_ADDR_IN,
- SLV_READ_IN => SLV_READ_IN,
- SLV_WRITE_IN => SLV_WRITE_IN,
- SLV_BUSY_OUT => SLV_BUSY_OUT,
- SLV_ACK_OUT => SLV_ACK_OUT,
- SLV_DATA_IN => SLV_DATA_IN,
- SLV_DATA_OUT => SLV_DATA_OUT,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_BUSY_OUT => BUS_IP_TX.nack,
+ SLV_ACK_OUT => BUS_IP_TX.ack,
+ SLV_DATA_IN => BUS_IP_RX.data,
+ SLV_DATA_OUT => BUS_IP_TX.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
-- SLV_ACK_OUT => open, --SLV_ACK_OUT,
-- SLV_DATA_IN => (others => '0'), --SLV_DATA_IN,
-- SLV_DATA_OUT => open, --SLV_DATA_OUT,
- SLV_ADDR_IN => SLV_ADDR_IN,
- SLV_READ_IN => SLV_READ_IN,
- SLV_WRITE_IN => SLV_WRITE_IN,
- SLV_BUSY_OUT => open,
- SLV_ACK_OUT => open,
- SLV_DATA_IN => SLV_DATA_IN,
- SLV_DATA_OUT => open,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_DATA_IN => BUS_IP_RX.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
-- SLV_ACK_OUT => open, --SLV_ACK_OUT,
-- SLV_DATA_IN => (others => '0'), --SLV_DATA_IN,
-- SLV_DATA_OUT => open, --SLV_DATA_OUT,
- SLV_ADDR_IN => SLV_ADDR_IN,
- SLV_READ_IN => SLV_READ_IN,
- SLV_WRITE_IN => SLV_WRITE_IN,
- SLV_BUSY_OUT => open,
- SLV_ACK_OUT => open,
- SLV_DATA_IN => SLV_DATA_IN,
- SLV_DATA_OUT => open,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_DATA_IN => BUS_IP_RX.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
-- SLV_ACK_OUT => open, --SLV_ACK_OUT,
-- SLV_DATA_IN => (others => '0'), --SLV_DATA_IN,
-- SLV_DATA_OUT => open, --SLV_DATA_OUT,
- SLV_ADDR_IN => SLV_ADDR_IN,
- SLV_READ_IN => SLV_READ_IN,
- SLV_WRITE_IN => SLV_WRITE_IN,
- SLV_BUSY_OUT => open,
- SLV_ACK_OUT => open,
- SLV_DATA_IN => SLV_DATA_IN,
- SLV_DATA_OUT => open,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_DATA_IN => BUS_IP_RX.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
RESET => RESET,
-- interface to regio bus
- BUS_ADDR_IN => BUS_ADDR_IN,
- BUS_DATA_IN => BUS_DATA_IN,
- BUS_DATA_OUT => BUS_DATA_OUT,
- BUS_WRITE_EN_IN => BUS_WRITE_EN_IN,
- BUS_READ_EN_IN => BUS_READ_EN_IN,
- BUS_ACK_OUT => BUS_ACK_OUT,
+ BUS_ADDR_IN => BUS_REG_RX.addr(7 downto 0),
+ BUS_DATA_IN => BUS_REG_RX.data,
+ BUS_DATA_OUT => BUS_REG_TX.data,
+ BUS_WRITE_EN_IN => BUS_REG_RX.write,
+ BUS_READ_EN_IN => BUS_REG_RX.read,
+ BUS_ACK_OUT => BUS_REG_TX.ack,
-- output to gbe_buf
GBE_SUBEVENT_ID_OUT => cfg_subevent_id,