new dirich flash scheme, IF

diff --cc thresholds/thresholds.prj
index a9a4dde16663bcde2624af43ca6ae9c9059fee96,7b41ec9f8405a85752e54c54c2ea3c2897ff03b4..d570bd6614e357fc84b932efd5c64b04f4ccc88a
--- 1/thresholds/thresholds.prj
--- 2/thresholds/thresholds.prj
+++ b/thresholds/thresholds.prj
@@@ -12,13 -8,10 +8,9 @@@ add_file -vhdl -lib work "../../trbnet/
  add_file -vhdl -lib work "../../vhdlbasics/interface/spi_slave.vhd"
  add_file -vhdl -lib work "../../vhdlbasics/machxo3/sedcheck.vhd"
  add_file -vhdl -lib work "../../vhdlbasics/io/pwm.vhd"
- #add_file -vhdl -lib work "../../logicbox/UFM_control/UFM_control.vhd"
 -add_file -vhdl -lib work "../../logicbox/UFM_control/UFM_control.vhd"
+ 
 -add_file -vhdl    -lib work "../../vhdlbasics/machxo3/flash/flashram.vhd"
 -add_file -vhdl    -lib work "../../vhdlbasics/machxo3/flash/flash.vhd"
 +add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flashram.vhd"
 +add_file -vhdl -lib work "../../vhdlbasics/machxo3/flash/flash.vhd"
- 
- 
- #add_file -vhdl -lib work "../../logicbox/cores/flashram.vhd"
- #add_file -vhdl -lib work "cores/efb.vhd"
  add_file -verilog -lib work "../../vhdlbasics/machxo3/flash/efb_define_def.v"
  add_file -verilog -lib work "../../vhdlbasics/machxo3/flash/UFM_WB.v"